Feat: Support EIP1559 (#1030)

* setup multiple test bytes

* add debug bytes

* retrace debug: add ad sk idx

* retrace debug: add access list idx wit

* add additional witness columns

* add additional witness columns

* add constraints

* add constraints

* add constraints

* add constraints

* generate correct stack states

* correct stack witness generation

* add stack accumulator

* fmt

* fmt

* remove debug flag

* correct tx circuit lookup
:

* decoding table

* correct degree

* add decoding table

* add decoding table assignment

* reduce degree

* unnecessary import

* fmt

* fix constraints

* fix constraints

* add stack ptr increase

* fix constraints

* fmt

* add stack op witness

* add stack op witness

* add stack constraints

* fmt

* add stack constraints

* add stack end condition

* fmt

* fmt

* rename beginlist and endlist

* adjust test case

* change address naming to depth

* add instrument booleans

* add consistency constraints for access list

* add consistency constraints for access list

* adjust test

* remove debug flag

* fmt

* refactor accumulating coeff

* add stack op enum

* refactor decoding table witness

* refactor access list indicator columns

* remove auto code

* refactor syntax

* remove comment

* add comment

* add missing constraints

* refactor syntax

* debug commit

* remove debug line

* refactor constructor

* refactor push constructor

* refactor pop constructor

* refactor update

* fmt

* remove import

* debug commit

* restore test. fix lookup conditional

* restore column in tx table

* restore access list idx columns:

* add access list dynamic assignment

* restore dynamic access list assignment

* resolve merge conflict

* add section denoter for access list

* add access list rlc helper

* adjust column and new section init

* add boolean instruments, degree fix

* add constraints

* add constraints

* add rlp lookup

* add section_rlc starting for access list

* add section_rlc accumulation

* recover section constraint

* look up access list address

* lookup access list storage key len

* fmt

* fmt clippy

* remove debug tags

* correct lookup of address and storage keys

* remove debug flag

* add extra gas fields for 1559

* comment

* fmt

* fmt

* add option guard

* fmt

* unwrap guard

* correct witness rows

* fmt

* add comment

* add instrument to fix degree

* fix rlp lookup

* remove debug tag

* remove debug tag

* style fmt

* adjust section transition

* cargo

* clip cargo lock

* correct merge

* debug commit

* uncomment test

* correct fn name

* remove output

* refactor assignment

* add lookup

* fmt

* fmt

* restore test

* remove duplicate

* add comments

* add comments'

* fmt

* remove engagement of stack acc

* remove stack_acc and add new witness

* add lookup from rlp_table

* comment correction

* add depth constraint decoding table

* add cross-depth lookup in decoding table

* fmt

* clippy

* rm comments

* stack op order correction

* add more strict constraints

* remove debug flags

* remove debug output

* fmt

* adjust stack table columns

* add stack op id check

* adjust access list idx position

* revert "adjust access list idx position"

This reverts commit aecd544.

* remove debug flags

* recover init

* recover push and pop lookups

* add op constraints

* fmt

* degree reduction boolean constraints

* add constraints

* fmt

* clippy

---------

Co-authored-by: xkx <xiakunxian130@gmail.com>

bus-mapping/src/evm/opcodes/begin_end_tx.rs

@@ -749,7 +749,7 @@ fn gen_tx_eip2930_ops(
     state: &mut CircuitInputStateRef,
     exec_step: &mut ExecStep,
 ) -> Result<(), Error> {
-    if !state.tx.tx_type.is_eip2930_tx() {
+    if !state.tx.tx_type.is_eip2930() {
         return Ok(());
     }
 

eth-types/src/geth_types.rs

@@ -52,14 +52,24 @@ impl TxType {
         matches!(*self, Self::L1Msg)
     }
 
-    /// If this type is EIP-155 or not
-    pub fn is_eip155_tx(&self) -> bool {
-        matches!(*self, Self::Eip155)
+    /// If this type is PreEip155
+    pub fn is_pre_eip155(&self) -> bool {
+        matches!(*self, TxType::PreEip155)
     }
 
-    /// If this type is EIP-2930 or not
-    pub fn is_eip2930_tx(&self) -> bool {
-        matches!(*self, Self::Eip2930)
+    /// If this type is EIP155 or not
+    pub fn is_eip155(&self) -> bool {
+        matches!(*self, TxType::Eip155)
+    }
+
+    /// If this type is Eip1559 or not
+    pub fn is_eip1559(&self) -> bool {
+        matches!(*self, TxType::Eip1559)
+    }
+
+    /// If this type is Eip2930 or not
+    pub fn is_eip2930(&self) -> bool {
+        matches!(*self, TxType::Eip2930)
     }
 
     /// Get the type of transaction

go.work.sum

@@ -0,0 +1 @@
+golang.org/x/text v0.13.0/go.mod h1:TvPlkZtksWOMsz7fbANvkp4WM8x/WCo/om8BMLbz+aE=

zkevm-circuits/src/pi_circuit.rs

@@ -977,6 +977,9 @@ impl<F: Field> PiCircuitConfig<F> {
             }
         }
         // Copy tx_hashes to tx table
+        log::trace!("tx_copy_cells: {:?}", tx_copy_cells);
+        log::trace!("tx_value_cells: {:?}", tx_value_cells);
+
         for (i, tx_hash_cell) in tx_copy_cells.into_iter().enumerate() {
             region.constrain_equal(
                 tx_hash_cell.cell(),