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RISC-V ISA Formal Verification files for SiemensEDA OneSpin tool. #993

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pascalgouedo
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Signed-off-by: Pascal Gouedo <pascal.gouedo@dolphin.fr>
@pascalgouedo pascalgouedo added Component:Verif For issues in the verification environment or test cases (e.g. for testbench, C code, etc.) Component:Tool-and-build For issues in the tool and build flow (e.g. Makefile, FuseSoc, etc.) labels May 30, 2024
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@MikeOpenHWGroup MikeOpenHWGroup left a comment

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Thanks @pascalgouedo. One request and one question:
Request: can you add Solderpad license headers to these files (the one-liner SPDX header is sufficient)?
Question: is the obfuscated TcL file readable by tools other than OneSpin?

@pascalgouedo
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Hi Mike,

I am pretty sure this encrypted tcl file is using a OneSpin private key like it is done for automatically generated assertions SystemVerilog file.
And anyway I think nothing here can be used in any other tool.

For Solderpad license I should maybe ask (again) to SiemensEDA to be sure.

Only restrictions I remember was about FormalVerifPlan excel file, not on those tool setup files.

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For Solderpad license I should maybe ask (again) to SiemensEDA to be sure.

Thanks. This is important to OpenHW for obvious reasons.

Pascal Gouedo added 3 commits June 3, 2024 16:58
Signed-off-by: Pascal Gouedo <pascal.gouedo@dolphin.fr>
Signed-off-by: Pascal Gouedo <pascal.gouedo@dolphin.fr>
Signed-off-by: Pascal Gouedo <pascal.gouedo@dolphin.fr>
@MikeOpenHWGroup MikeOpenHWGroup merged commit f1e13ed into openhwgroup:dev Jun 3, 2024
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pascalgouedo pushed a commit to pascalgouedo/cv32e40p that referenced this pull request Jun 3, 2024
pascalgouedo pushed a commit that referenced this pull request Jun 3, 2024
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2 participants