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[ImportVerilog] add real literal support, refine real type, and add real format support #8020

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chenbo-again
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This PR is aimed to support systemverilog real, shortreal, realtime, and there conversion and operation.

One thing I'm not so sure about is that

class BinaryOpBase<string mnemonic, list<Trait> traits = []> :
    MooreOp<mnemonic, traits # [Pure, SameOperandsAndResultType]> {
  let arguments = (ins SimpleBitVectorType:$lhs, SimpleBitVectorType:$rhs);
  let results = (outs SimpleBitVectorType:$result);
  let assemblyFormat = [{
    $lhs `,` $rhs attr-dict `:` type($result)
  }];
}

why this opbase just support SimpleBitVectorType? is there any shortcoming to just convert it to a UnpackedType? I also want to use this OpBase support float point operation.

@chenbo-again chenbo-again marked this pull request as draft December 29, 2024 18:04
@hailongSun2000
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Maybe we can extend its argument and result type, like AnyStaticArrayType defined in MooreTypes.td.

@hailongSun2000
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Could you add some test cases? And thanks for your work on this 😄.

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