patches-6.12: bcm27xx: refresh patch set

The patches were generated from the RPi repo with the following command:
git format-patch v6.12.5..rpi-6.12.y

Then used update_kernel.sh to rebase against 6.12.5.

Removed wireless drivers, Github workflows, and defconfigs patches.
The following was used to flag potential patches to exclude:

ls|grep -i brcm
ls|grep -i github
ls|grep -i config
ls|grep -i readme

Also helpful to grep for keywords in patches to manually inspect
like: grep defconfig *.patch

Signed-off-by: John Audia <therealgraysky@proton.me>

target/linux/bcm27xx/patches-6.12/950-0004-Revert-spi-spidev-Fix-CS-polarity-if-GPIO-descriptor.patch

@@ -0,0 +1,22 @@
+From a62617fb025786c90d0654938fa6adebc3bf4476 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Mon, 20 Apr 2020 13:41:10 +0100
+Subject: [PATCH 004/699] Revert "spi: spidev: Fix CS polarity if GPIO
+ descriptors are used"
+
+This reverts commit 83b2a8fe43bda0c11981ad6afa5dd0104d78be28.
+---
+ drivers/spi/spidev.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/spi/spidev.c
++++ b/drivers/spi/spidev.c
+@@ -428,7 +428,7 @@ spidev_ioctl(struct file *filp, unsigned
+ 			}
+
+ 			if (ctlr->use_gpio_descriptors && spi_get_csgpiod(spi, 0))
+-				tmp |= SPI_CS_HIGH;
++				{ /*tmp |= SPI_CS_HIGH;*/ }
+
+ 			tmp |= spi->mode & ~SPI_MODE_MASK;
+ 			spi->mode = tmp & SPI_MODE_USER_MASK;

target/linux/bcm27xx/patches-6.12/950-0005-Revert-net-bcmgenet-Request-APD-DLL-disable-and-IDDQ.patch

@@ -0,0 +1,29 @@
+From e5eca472fcd0d6b0cc854847adabe7d1d9a8072e Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Mon, 7 Mar 2022 16:18:55 +0000
+Subject: [PATCH 005/699] Revert "net: bcmgenet: Request APD, DLL disable and
+ IDDQ-SR"
+
+This reverts commit c3a4c69360ab43560f212eed326c9d8bde35b14c, which
+broke rebooting when network booting.
+
+See: https://github.com/raspberrypi/rpi-eeprom/issues/417
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/net/ethernet/broadcom/genet/bcmmii.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c
++++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c
+@@ -304,9 +304,7 @@ int bcmgenet_mii_probe(struct net_device
+ 	struct device_node *dn = kdev->of_node;
+ 	phy_interface_t phy_iface = priv->phy_interface;
+ 	struct phy_device *phydev;
+-	u32 phy_flags = PHY_BRCM_AUTO_PWRDWN_ENABLE |
+-			PHY_BRCM_DIS_TXCRXC_NOENRGY |
+-			PHY_BRCM_IDDQ_SUSPEND;
++	u32 phy_flags = 0;
+ 	int ret;
+
+ 	/* Communicate the integrated PHY revision */

target/linux/bcm27xx/patches-6.12/950-0006-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch

@@ -0,0 +1,69 @@
+From b86cd8724f272287a83969a929ea0722cd817163 Mon Sep 17 00:00:00 2001
+From: Dom Cobley <popcornmix@gmail.com>
+Date: Mon, 31 Jul 2023 13:47:10 +0100
+Subject: [PATCH 006/699] Revert "Revert "xhci: add quirk for host controllers
+ that don't update endpoint DCS""
+
+This reverts commit 5bef4b3cb95a5b883dfec8b3ffc0d671323d55bb.
+
+We don't agree with upstream revert so undo it.
+---
+ drivers/usb/host/xhci-pci.c  |  4 +++-
+ drivers/usb/host/xhci-ring.c | 23 ++++++++++++++++++++++-
+ 2 files changed, 25 insertions(+), 2 deletions(-)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -424,8 +424,10 @@ static void xhci_pci_quirks(struct devic
+ 			pdev->device == 0x3432)
+ 		xhci->quirks |= XHCI_BROKEN_STREAMS;
+
+-	if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483)
++	if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
+ 		xhci->quirks |= XHCI_LPM_SUPPORT;
++		xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
++	}
+
+ 	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
+ 		pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) {
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -637,8 +637,11 @@ static int xhci_move_dequeue_past_td(str
+ 	struct xhci_ring *ep_ring;
+ 	struct xhci_command *cmd;
+ 	struct xhci_segment *new_seg;
++	struct xhci_segment *halted_seg = NULL;
+ 	union xhci_trb *new_deq;
+ 	int new_cycle;
++	union xhci_trb *halted_trb;
++	int index = 0;
+ 	dma_addr_t addr;
+ 	u64 hw_dequeue;
+ 	bool cycle_found = false;
+@@ -657,7 +660,25 @@ static int xhci_move_dequeue_past_td(str
+ 	hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
+ 	new_seg = ep_ring->deq_seg;
+ 	new_deq = ep_ring->dequeue;
+-	new_cycle = hw_dequeue & 0x1;
++
++	/*
++	 * Quirk: xHC write-back of the DCS field in the hardware dequeue
++	 * pointer is wrong - use the cycle state of the TRB pointed to by
++	 * the dequeue pointer.
++	 */
++	if (xhci->quirks & XHCI_EP_CTX_BROKEN_DCS &&
++	    !(ep->ep_state & EP_HAS_STREAMS))
++		halted_seg = trb_in_td(xhci, td, hw_dequeue & ~0xf, false);
++	if (halted_seg) {
++		index = ((dma_addr_t)(hw_dequeue & ~0xf) - halted_seg->dma) /
++			 sizeof(*halted_trb);
++		halted_trb = &halted_seg->trbs[index];
++		new_cycle = halted_trb->generic.field[3] & 0x1;
++		xhci_dbg(xhci, "Endpoint DCS = %d TRB index = %d cycle = %d\n",
++			 (u8)(hw_dequeue & 0x1), index, new_cycle);
++	} else {
++		new_cycle = hw_dequeue & 0x1;
++	}
+
+ 	/*
+ 	 * We want to find the pointer, segment and cycle state of the new trb

target/linux/bcm27xx/patches-6.12/950-0007-Revert-PCI-brcmstb-Configure-HW-CLKREQ-mode-appropri.patch

@@ -0,0 +1,156 @@
+From 64749a5c99287249e2c542d6177d3e1f02505056 Mon Sep 17 00:00:00 2001
+From: Dom Cobley <popcornmix@gmail.com>
+Date: Fri, 2 Feb 2024 13:04:00 +0000
+Subject: [PATCH 007/699] Revert "PCI: brcmstb: Configure HW CLKREQ# mode
+ appropriate for downstream device"
+
+This reverts commit e2596dcf1e9dfd5904d50f796c19b03c94a3b8b4.
+---
+ drivers/pci/controller/pcie-brcmstb.c | 100 +++-----------------------
+ 1 file changed, 10 insertions(+), 90 deletions(-)
+
+--- a/drivers/pci/controller/pcie-brcmstb.c
++++ b/drivers/pci/controller/pcie-brcmstb.c
+@@ -48,9 +48,6 @@
+ #define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY			0x04dc
+ #define  PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK	0xc00
+
+-#define PCIE_RC_CFG_PRIV1_ROOT_CAP			0x4f8
+-#define  PCIE_RC_CFG_PRIV1_ROOT_CAP_L1SS_MODE_MASK	0xf8
+-
+ #define PCIE_RC_DL_MDIO_ADDR				0x1100
+ #define PCIE_RC_DL_MDIO_WR_DATA				0x1104
+ #define PCIE_RC_DL_MDIO_RD_DATA				0x1108
+@@ -127,12 +124,9 @@
+ 		PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
+
+ #define  PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK	0x2
+-#define  PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK		0x200000
+ #define  PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK		0x08000000
+ #define  PCIE_BMIPS_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK		0x00800000
+-#define  PCIE_CLKREQ_MASK \
+-	  (PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK | \
+-	   PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK)
++
+
+ #define PCIE_MISC_UBUS_BAR1_CONFIG_REMAP			0x40ac
+ #define  PCIE_MISC_UBUS_BAR1_CONFIG_REMAP_ACCESS_EN_MASK	BIT(0)
+@@ -1187,93 +1181,13 @@ static int brcm_pcie_setup(struct brcm_p
+ 	return 0;
+ }
+
+-/*
+- * This extends the timeout period for an access to an internal bus.  This
+- * access timeout may occur during L1SS sleep periods, even without the
+- * presence of a PCIe access.
+- */
+-static void brcm_extend_rbus_timeout(struct brcm_pcie *pcie)
+-{
+-	/* TIMEOUT register is two registers before RGR1_SW_INIT_1 */
+-	const unsigned int REG_OFFSET = PCIE_RGR1_SW_INIT_1(pcie) - 8;
+-	u32 timeout_us = 4000000; /* 4 seconds, our setting for L1SS */
+-
+-	/* 7712 does not have this (RGR1) timer */
+-	if (pcie->soc_base == BCM7712)
+-		return;
+-
+-	/* Each unit in timeout register is 1/216,000,000 seconds */
+-	writel(216 * timeout_us, pcie->base + REG_OFFSET);
+-}
+-
+-static void brcm_config_clkreq(struct brcm_pcie *pcie)
+-{
+-	static const char err_msg[] = "invalid 'brcm,clkreq-mode' DT string\n";
+-	const char *mode = "default";
+-	u32 clkreq_cntl;
+-	int ret, tmp;
+-
+-	ret = of_property_read_string(pcie->np, "brcm,clkreq-mode", &mode);
+-	if (ret && ret != -EINVAL) {
+-		dev_err(pcie->dev, err_msg);
+-		mode = "safe";
+-	}
+-
+-	/* Start out assuming safe mode (both mode bits cleared) */
+-	clkreq_cntl = readl(pcie->base + HARD_DEBUG(pcie));
+-	clkreq_cntl &= ~PCIE_CLKREQ_MASK;
+-
+-	if (strcmp(mode, "no-l1ss") == 0) {
+-		/*
+-		 * "no-l1ss" -- Provides Clock Power Management, L0s, and
+-		 * L1, but cannot provide L1 substate (L1SS) power
+-		 * savings. If the downstream device connected to the RC is
+-		 * L1SS capable AND the OS enables L1SS, all PCIe traffic
+-		 * may abruptly halt, potentially hanging the system.
+-		 */
+-		clkreq_cntl |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK;
+-		/*
+-		 * We want to un-advertise L1 substates because if the OS
+-		 * tries to configure the controller into using L1 substate
+-		 * power savings it may fail or hang when the RC HW is in
+-		 * "no-l1ss" mode.
+-		 */
+-		tmp = readl(pcie->base + PCIE_RC_CFG_PRIV1_ROOT_CAP);
+-		u32p_replace_bits(&tmp, 2, PCIE_RC_CFG_PRIV1_ROOT_CAP_L1SS_MODE_MASK);
+-		writel(tmp, pcie->base + PCIE_RC_CFG_PRIV1_ROOT_CAP);
+-
+-	} else if (strcmp(mode, "default") == 0) {
+-		/*
+-		 * "default" -- Provides L0s, L1, and L1SS, but not
+-		 * compliant to provide Clock Power Management;
+-		 * specifically, may not be able to meet the Tclron max
+-		 * timing of 400ns as specified in "Dynamic Clock Control",
+-		 * section 3.2.5.2.2 of the PCIe spec.  This situation is
+-		 * atypical and should happen only with older devices.
+-		 */
+-		clkreq_cntl |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK;
+-		brcm_extend_rbus_timeout(pcie);
+-
+-	} else {
+-		/*
+-		 * "safe" -- No power savings; refclk is driven by RC
+-		 * unconditionally.
+-		 */
+-		if (strcmp(mode, "safe") != 0)
+-			dev_err(pcie->dev, err_msg);
+-		mode = "safe";
+-	}
+-	writel(clkreq_cntl, pcie->base + HARD_DEBUG(pcie));
+-
+-	dev_info(pcie->dev, "clkreq-mode set to %s\n", mode);
+-}
+-
+ static int brcm_pcie_start_link(struct brcm_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+ 	void __iomem *base = pcie->base;
+ 	u16 nlw, cls, lnksta;
+ 	bool ssc_good = false;
++	u32 tmp;
+ 	int ret, i;
+
+ 	/* Unassert the fundamental reset */
+@@ -1300,8 +1214,6 @@ static int brcm_pcie_start_link(struct b
+ 		return -ENODEV;
+ 	}
+
+-	brcm_config_clkreq(pcie);
+-
+ 	if (pcie->gen)
+ 		brcm_pcie_set_gen(pcie, pcie->gen);
+
+@@ -1320,6 +1232,14 @@ static int brcm_pcie_start_link(struct b
+ 		 pci_speed_string(pcie_link_speed[cls]), nlw,
+ 		 ssc_good ? "(SSC)" : "(!SSC)");
+
++	/*
++	 * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1
++	 * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1.
++	 */
++	tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
++	tmp |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK;
++	writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
++
+ 	return 0;
+ }
+

target/linux/bcm27xx/patches-6.12/950-0008-Revert-ARM-dts-bcm2711-Add-BCM2711-xHCI-support.patch

@@ -0,0 +1,52 @@
+From 9d0cf608e42d5a95202aa3505f2ab1e5e49e717f Mon Sep 17 00:00:00 2001
+From: Dom Cobley <popcornmix@gmail.com>
+Date: Wed, 31 Jan 2024 19:47:39 +0000
+Subject: [PATCH 008/699] Revert "ARM: dts: bcm2711: Add BCM2711 xHCI support"
+
+This reverts commit 522c35e08b53f157ad3e51848caa861b258001e4.
+---
+ arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi |  5 -----
+ arch/arm/boot/dts/broadcom/bcm2711.dtsi     | 14 --------------
+ 2 files changed, 19 deletions(-)
+
+--- a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi
++++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi
+@@ -1,7 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ #include "bcm2835-rpi.dtsi"
+
+-#include <dt-bindings/power/raspberrypi-power.h>
+ #include <dt-bindings/reset/raspberrypi,firmware-reset.h>
+
+ / {
+@@ -101,7 +100,3 @@
+ &vchiq {
+ 	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ };
+-
+-&xhci {
+-	power-domains = <&power RPI_POWER_DOMAIN_USB>;
+-};
+--- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi
++++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi
+@@ -604,20 +604,6 @@
+ 			};
+ 		};
+
+-		xhci: usb@7e9c0000 {
+-			compatible = "brcm,bcm2711-xhci", "brcm,xhci-brcm-v2";
+-			reg = <0x0 0x7e9c0000 0x100000>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+-			/* DWC2 and this IP block share the same USB PHY,
+-			 * enabling both at the same time results in lockups.
+-			 * So keep this node disabled and let the bootloader
+-			 * decide which interface should be enabled.
+-			 */
+-			status = "disabled";
+-		};
+-
+ 		v3d: gpu@7ec00000 {
+ 			compatible = "brcm,2711-v3d";
+ 			reg = <0x0 0x7ec00000 0x4000>,

target/linux/bcm27xx/patches-6.12/950-0009-Revert-usb-phy-generic-Get-the-vbus-supply.patch

@@ -0,0 +1,26 @@
+From f03f7d5444533b9bdf116901d732d05354bad0a4 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Thu, 28 Mar 2024 16:16:37 +0000
+Subject: [PATCH 009/699] Revert "usb: phy: generic: Get the vbus supply"
+
+This reverts commit 03e607cbb2931374db1825f371e9c7f28526d3f4.
+---
+ drivers/usb/phy/phy-generic.c | 7 -------
+ 1 file changed, 7 deletions(-)
+
+--- a/drivers/usb/phy/phy-generic.c
++++ b/drivers/usb/phy/phy-generic.c
+@@ -256,13 +256,6 @@ int usb_phy_gen_create_phy(struct device
+ 		return dev_err_probe(dev, PTR_ERR(nop->vcc),
+ 				     "could not get vcc regulator\n");
+
+-	nop->vbus_draw = devm_regulator_get_exclusive(dev, "vbus");
+-	if (PTR_ERR(nop->vbus_draw) == -ENODEV)
+-		nop->vbus_draw = NULL;
+-	if (IS_ERR(nop->vbus_draw))
+-		return dev_err_probe(dev, PTR_ERR(nop->vbus_draw),
+-				     "could not get vbus regulator\n");
+-
+ 	nop->dev		= dev;
+ 	nop->phy.dev		= nop->dev;
+ 	nop->phy.label		= "nop-xceiv";