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TOBB ETU
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- http://erendurucan.engineer
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Canvas-Painting-Language-Lex-Yacc
Canvas-Painting-Language-Lex-Yacc PublicThis is an interpreter for a text canvas painting language. The language is called Peakasso.
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Round-Robin-Scheduler-C-Language
Round-Robin-Scheduler-C-Language PublicThis program works as a Round-Robin Scheduler that takes commands from the user and simulates the scheduler to run the tasks one by one in one unit of time.
C
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32-bit-RISC-V-Cpu-Design-Verilog
32-bit-RISC-V-Cpu-Design-Verilog PublicThis RISCV CPU Architecture is designed on the efficient and effective operation of all instructions. However, for simulation purposes, a processor that can work with 15 instructions has been desig…
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Cache-Controller-and-Branch-Prediction-Verilog
Cache-Controller-and-Branch-Prediction-Verilog PublicThe main memory module implements the memory behavior with a data chunk size of 32 bytes and a 100 cycles operation delay. the cache module contains a state machine that allows 4-byte aligned read/…
Verilog
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Extract-IP-Addresses-and-Dates-Python
Extract-IP-Addresses-and-Dates-Python PublicIn this program, you are asked to extract IP Addresses and Dates from the server logs. However, since the existing dates have unnecessary information we want you to convert the format as well. You …
Python
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