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Merge pull request #25 from cyberboy666/v0_7_2
V0 7 2
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(footprint "DIP+SOIC-16" (version 20211014) (generator pcbnew) | ||
(layer "F.Cu") | ||
(tedit 5A02E8C5) | ||
(descr "16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads") | ||
(tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads") | ||
(attr through_hole) | ||
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