Fix some typos in docs and comments

BUILDING

@@ -274,7 +274,7 @@ The makefile supports several targets:
    existing `scheme` executable, which must be sufficiently compatible
    version of Chez Scheme. (It doesn't need to be the same version,
    but it needs to have some compatible internal structure.) Supply
-   `SCHEME=<scheme>` to select the Scheme implementaion.
+   `SCHEME=<scheme>` to select the Scheme implementation.
 
    To use this target for a machine type whose boot files are not
    present (which would be typical for this target), run "configure"
@@ -391,7 +391,7 @@ after <machine type>:
  * `/config` or `/none`
 
    Configures for a machine type, including creating the
-   `nmake`-compable "Makefile", but does not build.
+   `nmake`-compatible "Makefile", but does not build.
 
  * `/kernel`
 

IMPLEMENTATION.md

@@ -767,7 +767,7 @@ ways:
 
 # Variables and Register Allocation
 
-A variables in Scheme code can be allocated either to a register or to
+Variables in Scheme code can be allocated either to a register or to
 a location in the stack frame, and the same goes for temporaries that
 are needed to evaluate subexpressions. Naturally, variables and
 temporaries with non-overlapping extents can be mapped to the same
@@ -810,7 +810,7 @@ Intermediate code in later passes of the compiler can also refer to
 registers directly, and those uses are taken into account by the
 register allocator.
 
-Overall, the allocator see several kinds of "variables":
+Overall, the allocator sees several kinds of "variables":
 
  * real registers;
 
@@ -843,7 +843,7 @@ that
 ```scheme
         (set! %r1 v1)
         (set! %r1 v2)
-        ... use %r1, sometimes expecting v1 and sometimess v2 ...
+        ... use %r1, sometimes expecting v1 and sometimes v2 ...
 ```
 
 looks fine, and it may optimize away the first assignment. [Note:
@@ -1142,7 +1142,7 @@ binds `andi-op`, and `(emit andi arg2 ...)` turns into `(logical-op
 `emit`. The last argument is conventionally `code*`, which is the code
 list to be extended with new code at its beginning (because the
 machine-code list is built end to start). The bounce from `andi-op` to
-`logicial-op` is because many instructions follow a similar encoding,
+`logical-op` is because many instructions follow a similar encoding,
 such as different bitwise-logical operations like `and` and `or`.
 Meanwhile, `logical-op` uses an `emit-code` form, which is also in
 "arm64.ss" and other backends, that calls `aop-cons` with a suitable

s/cpnanopass.ss

@@ -4879,7 +4879,7 @@
           (lambda ()
             ; Since cp is not always a real register, and the mref form requires us to put a var of some sort
             ; in for its base, we need to move cp to to a real register.  Unfortunately, there do not seem to be
-            ; enough real registers available, since ac0 is in use through out, xp and td serve as temopraries, and
+            ; enough real registers available, since ac0 is in use through out, xp and td serve as temporaries, and
             ; we'd like to keep ts free to serve for memory to memory moves.
             ; Since this is the case, we need a temporary to put cp into when we are working with it and
             ; xp is the natural choice (or td or ts if we switched amongst their roles)