feat(Backend): Accelerate CSRR instructions by performing out-of-order execution on most CSRs #9913
emu.yml
on: pull_request
Changes Detection
6s
Generate Verilog
5h 5m
EMU - Basics
4h 56m
EMU - CHI
1h 3m
EMU - Performance
3h 21m
EMU - MC
6h 5m
SIMV - Basics
3h 43m
Check Submodules
40s
Annotations
5 warnings
Changes Detection
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
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Changes Detection
Unexpected input(s) 'predicate-quantifier', valid inputs are ['token', 'working-directory', 'ref', 'base', 'filters', 'list-files', 'initial-fetch-depth']
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Check Submodules
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636
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Generate Verilog
Failed to download action 'https://api.github.com/repos/actions/checkout/tarball/11bd71901bbe5b1630ceea73d27597364c9af683'. Error: The SSL connection could not be established, see inner exception.
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Generate Verilog
Back off 22.666 seconds before retry.
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