From 46b914414d0a68b085597863924732ec622589e4 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 29 Oct 2024 11:39:41 -0700 Subject: [PATCH] Update README with versioning --- README.md | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index b70b329..a5a2b41 100644 --- a/README.md +++ b/README.md @@ -8,4 +8,11 @@ It exists purely as a demonstrative example of another RISC-V CPU design point. The superscalar microarchitecture presents the most advantages for 1) floating-point kernels and 2) RoCC accelerator kernels, as scalar control code can execute concurrently with floating point or RoCC instructions, maintaining high utilization of those units. -Shuttle is tape-out proven, and has similar physical design complexity as Rocket. \ No newline at end of file +Shuttle is tape-out proven, and has similar physical design complexity as Rocket. + +## Versioning + +* **1.0**: Initial 6-stage RV64GC Release +* **1.1**: Support integration with vector units +* **1.2**: Support B-extension (Zba/Zbb/Zbs) +* **2.0**: 7-stage pipeline \ No newline at end of file