diff --git a/CHANGELOG.md b/CHANGELOG.md index 23f11071a..d2f53cfe4 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -15,6 +15,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Support for the onboard real-time clock (RTC) ([#136](https://github.com/stm32-rs/stm32f3xx-hal/pull/136)) - Enable DMA for USART on `stm32f302` devices ([#139](https://github.com/stm32-rs/stm32f3xx-hal/pull/139)) +### Changed + +- Introduced auto-generated GPIO mappings based on the STM32CubeMX database + ([#129](https://github.com/stm32-rs/stm32f3xx-hal/pull/129)) + ## [v0.5.0] - 2020-07-21 ### Added diff --git a/Cargo.toml b/Cargo.toml index e9c51a296..0420e5f53 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -16,13 +16,15 @@ features = ["stm32f303xc", "rt", "stm32-usbd"] targets = ["thumbv7em-none-eabihf"] [dependencies] +cfg-if = "0.1" cortex-m = "0.6" cortex-m-rt = "0.6" embedded-dma = "0.1" embedded-hal = "0.2" nb = "0.1" -stm32f3 = "0.11" +paste = "1" rtcc = "0.2" +stm32f3 = "0.12" [dependencies.bare-metal] version = "0.2" @@ -53,30 +55,36 @@ device-selected = [] direct-call-deprecated = [] rt = ["stm32f3/rt"] +gpio-f302 = [] +gpio-f303 = [] +gpio-f303e = [] +gpio-f333 = [] +gpio-f373 = [] + # Any Changes here should be mirrored in README.md, src/lib.rs, and # .github/workflows/ci.yml. -stm32f301 = ["stm32f3/stm32f301", "device-selected"] -stm32f318 = ["stm32f3/stm32f301", "device-selected"] +stm32f301 = ["gpio-f302", "stm32f3/stm32f301", "device-selected"] +stm32f318 = ["gpio-f302", "stm32f3/stm32f301", "device-selected"] stm32f302 = ["stm32f3/stm32f302", "direct-call-deprecated"] -stm32f302xb = ["stm32f302", "device-selected"] -stm32f302xc = ["stm32f302", "device-selected"] -stm32f302xd = ["stm32f302", "device-selected"] -stm32f302xe = ["stm32f302", "device-selected"] -stm32f302x6 = ["stm32f302", "device-selected"] -stm32f302x8 = ["stm32f302", "device-selected"] +stm32f302x6 = ["stm32f302", "gpio-f302", "device-selected"] +stm32f302x8 = ["stm32f302", "gpio-f302", "device-selected"] +stm32f302xb = ["stm32f302", "gpio-f303", "device-selected"] +stm32f302xc = ["stm32f302", "gpio-f303", "device-selected"] +stm32f302xd = ["stm32f302", "gpio-f303e", "device-selected"] +stm32f302xe = ["stm32f302", "gpio-f303e", "device-selected"] stm32f303 = ["stm32f3/stm32f303", "direct-call-deprecated"] -stm32f303xb = ["stm32f303", "stm32-usbd/ram_access_1x16", "device-selected"] -stm32f303xc = ["stm32f303", "stm32-usbd/ram_access_1x16", "device-selected"] -stm32f303xd = ["stm32f303", "stm32-usbd/ram_access_2x16", "device-selected"] -stm32f303xe = ["stm32f303", "stm32-usbd/ram_access_2x16", "device-selected"] -stm32f303x6 = ["stm32f303", "device-selected"] -stm32f303x8 = ["stm32f303", "device-selected"] -stm32f373 = ["stm32f3/stm32f373", "device-selected"] -stm32f378 = ["stm32f3/stm32f373", "device-selected"] -stm32f334 = ["stm32f3/stm32f3x4", "device-selected"] -stm32f328 = ["stm32f3/stm32f3x8", "device-selected"] -stm32f358 = ["stm32f3/stm32f3x8", "device-selected"] -stm32f398 = ["stm32f3/stm32f3x8", "device-selected"] +stm32f303x6 = ["stm32f303", "gpio-f333", "device-selected"] +stm32f303x8 = ["stm32f303", "gpio-f333", "device-selected"] +stm32f303xb = ["stm32f303", "gpio-f303", "stm32-usbd/ram_access_1x16", "device-selected"] +stm32f303xc = ["stm32f303", "gpio-f303", "stm32-usbd/ram_access_1x16", "device-selected"] +stm32f303xd = ["stm32f303", "gpio-f303e", "stm32-usbd/ram_access_2x16", "device-selected"] +stm32f303xe = ["stm32f303", "gpio-f303e", "stm32-usbd/ram_access_2x16", "device-selected"] +stm32f373 = ["gpio-f373", "stm32f3/stm32f373", "device-selected"] +stm32f378 = ["gpio-f373", "stm32f3/stm32f373", "device-selected"] +stm32f334 = ["gpio-f333", "stm32f3/stm32f3x4", "device-selected"] +stm32f328 = ["gpio-f333", "stm32f3/stm32f3x8", "device-selected"] +stm32f358 = ["gpio-f303", "stm32f3/stm32f3x8", "device-selected"] +stm32f398 = ["gpio-f303e", "stm32f3/stm32f3x8", "device-selected"] [profile.dev] debug = true diff --git a/codegen/.cargo/config b/codegen/.cargo/config new file mode 100644 index 000000000..2f056549b --- /dev/null +++ b/codegen/.cargo/config @@ -0,0 +1,2 @@ +[build] +target = "x86_64-unknown-linux-gnu" diff --git a/codegen/.gitignore b/codegen/.gitignore new file mode 100644 index 000000000..eccd7b4ab --- /dev/null +++ b/codegen/.gitignore @@ -0,0 +1,2 @@ +/target/ +**/*.rs.bk diff --git a/codegen/Cargo.toml b/codegen/Cargo.toml new file mode 100644 index 000000000..e71083002 --- /dev/null +++ b/codegen/Cargo.toml @@ -0,0 +1,19 @@ +[package] +name = "codegen" +version = "0.1.0" +authors = ["Jan Teske "] +edition = "2018" + +[dependencies] +anyhow = "1" +once_cell = "1" +regex = "1" +serde-xml-rs = "0.4" + +[dependencies.structopt] +version = "0.3" +default-features = false + +[dependencies.serde] +version = "1" +features = ["derive"] diff --git a/codegen/README.md b/codegen/README.md new file mode 100644 index 000000000..e544c2773 --- /dev/null +++ b/codegen/README.md @@ -0,0 +1,56 @@ +# Codegen + +This crate provides code-generation for the stm32f3xx-hal. It reads information +from an [STM32CubeMX](https://www.st.com/en/development-tools/stm32cubemx.html) +database and uses that to output code that can directly be included into the +source code of the stm32f3xx-hal crate. + +For more information on how the STM32CubeMX database is structured, check out +the README in the [cube-parse](https://github.com/dbrgn/cube-parse) repository. + +Because by default cargo tries to use the `x86_64-unknown-linux-gnu` target, +when building `codegen`, due to what's specified in the `.cargo/config`, you +need to manually specify your host's target if it differs from that, e.g.: + +``` +$ cargo run --target x86_64-apple-darwin -- help +``` + +`codgen` can generate the following code: + +- [GPIO mappings](#gpio-mappings) + +## GPIO mappings + +Running `codegen`'s `gpio` subcommand generates the `gpio!` macro +invocations at the end of `src/gpio.rs`. Re-generating those macro-invocations +is simply a matter of deleting the old ones and then executing: + +``` +$ cargo run -- gpio $cubemx_db_path >> ../src/gpio.rs +``` + +`$cubemx_db_path` must be the path to the `db/` directory under an +STM32CubeMX installation. With a default Linux install, this would be +`/opt/stm32cubemx/db`. + +The generated `gpio!` invocations are gated by features whose names are derived +from the respective GPIO internal peripheral (IP) version: + +- gpio-f302 +- gpio-f303 +- gpio-f303e +- gpio-f333 +- gpio-f373 + +`codegen` collects those IP versions from the relevant GPIO IP description +files (located at `$cubemx_db_path/mcu/IP/GPIO-*.xml`). The root `` element +has a `Version` attribute with a value in the form of "STM32Fxxx_gpio_v1_0". +The feature name is constructed by dropping the parts constant between all +version strings and prepending "gpio-". + +Note that the GPIO IP version names don't necessarily match the MCUs they are +used in. For example, the GPIOs in `STM32F302xB` MCUs have the IP version +"STM32F303_gpio_v1_0". The MCU features of the `stm32f3xx-hal` also select the +correct `gpio-*` features, so users generally don't have to care about these +details. diff --git a/codegen/src/codegen/gpio.rs b/codegen/src/codegen/gpio.rs new file mode 100644 index 000000000..bee11caf5 --- /dev/null +++ b/codegen/src/codegen/gpio.rs @@ -0,0 +1,141 @@ +use crate::cubemx::ip::gpio; +use anyhow::{Context, Result}; +use once_cell::sync::Lazy; +use regex::Regex; +use std::collections::HashMap; + +struct Port<'a> { + id: char, + pins: Vec<&'a gpio::Pin>, +} + +pub fn gen_mappings(gpio_ips: &[gpio::Ip]) -> Result<()> { + for ip in gpio_ips.iter() { + println!(); + gen_gpio_ip(ip)?; + } + Ok(()) +} + +fn gen_gpio_ip(ip: &gpio::Ip) -> Result<()> { + let feature = ip_version_to_feature(&ip.version)?; + let ports = merge_pins_by_port(&ip.pins)?; + + println!(r#"#[cfg(feature = "{}")]"#, feature); + gen_gpio_macro_call(&ports, &feature)?; + Ok(()) +} + +fn ip_version_to_feature(ip_version: &str) -> Result { + static VERSION: Lazy = + Lazy::new(|| Regex::new(r"^STM32(?P\w+)_gpio_v1_0$").unwrap()); + + let captures = VERSION + .captures(&ip_version) + .with_context(|| format!("invalid GPIO IP version: {}", ip_version))?; + + let version = captures.name("version").unwrap().as_str(); + let feature = format!("gpio-{}", version.to_lowercase()); + Ok(feature) +} + +fn merge_pins_by_port(pins: &[gpio::Pin]) -> Result> { + let mut pins_by_port = HashMap::new(); + for pin in pins.iter() { + pins_by_port + .entry(pin.port()?) + .and_modify(|e: &mut Vec<_>| e.push(pin)) + .or_insert_with(|| vec![pin]); + } + + let mut ports = Vec::new(); + for (id, mut pins) in pins_by_port { + pins.sort_by_key(|p| p.number().unwrap_or_default()); + pins.dedup_by_key(|p| p.number().unwrap_or_default()); + ports.push(Port { id, pins }); + } + ports.sort_by_key(|p| p.id); + + Ok(ports) +} + +fn gen_gpio_macro_call(ports: &[Port], feature: &str) -> Result<()> { + println!("gpio!(["); + for port in ports { + gen_port(port, feature)?; + } + println!("]);"); + Ok(()) +} + +fn gen_port(port: &Port, feature: &str) -> Result<()> { + let pac_module = get_port_pac_module(port, feature); + + println!(" {{"); + println!( + " port: ({}/{}, pac: {}),", + port.id, + port.id.to_lowercase(), + pac_module, + ); + println!(" pins: ["); + + for pin in &port.pins { + gen_pin(pin)?; + } + + println!(" ],"); + println!(" }},"); + Ok(()) +} + +fn get_port_pac_module(port: &Port, feature: &str) -> &'static str { + // The registers in ports A and B have different reset values due to the + // presence of debug pins, so they get dedicated PAC modules. + match port.id { + 'A' => "gpioa", + 'B' => "gpiob", + 'D' if feature == "gpio-f373" => "gpiod", + _ => "gpioc", + } +} + +fn gen_pin(pin: &gpio::Pin) -> Result<()> { + let nr = pin.number()?; + let reset_mode = get_pin_reset_mode(pin)?; + let afr = if nr < 8 { 'L' } else { 'H' }; + let af_numbers = get_pin_af_numbers(pin)?; + + println!( + " {} => {{ reset: {}, afr: {}/{}, af: {:?} }},", + nr, + reset_mode, + afr, + afr.to_lowercase(), + af_numbers, + ); + + Ok(()) +} + +fn get_pin_reset_mode(pin: &gpio::Pin) -> Result<&'static str> { + // Debug pins default to their debug function (AF0), everything else + // defaults to floating input. + let mode = match (pin.port()?, pin.number()?) { + ('A', 13) | ('A', 14) | ('A', 15) | ('B', 3) | ('B', 4) => "AF0", + _ => "Input", + }; + Ok(mode) +} + +fn get_pin_af_numbers(pin: &gpio::Pin) -> Result> { + let mut numbers = Vec::new(); + for signal in &pin.pin_signals { + numbers.push(signal.af()?); + } + + numbers.sort(); + numbers.dedup(); + + Ok(numbers) +} diff --git a/codegen/src/codegen/mod.rs b/codegen/src/codegen/mod.rs new file mode 100644 index 000000000..72b04c6aa --- /dev/null +++ b/codegen/src/codegen/mod.rs @@ -0,0 +1,11 @@ +pub mod gpio; + +use crate::cubemx::package::Package; + +pub fn gen_autogen_comment(package: &Package) { + println!("// auto-generated using codegen"); + println!( + "// STM32CubeMX DB release: {}", + package.pack_description.release + ); +} diff --git a/codegen/src/cubemx/db.rs b/codegen/src/cubemx/db.rs new file mode 100644 index 000000000..f2f209eb2 --- /dev/null +++ b/codegen/src/cubemx/db.rs @@ -0,0 +1,33 @@ +use anyhow::{Context, Result}; +use serde::Deserialize; +use std::{ + fs::File, + path::{Path, PathBuf}, +}; + +pub struct Db { + root: PathBuf, +} + +impl Db { + pub fn new>(root: P) -> Self { + Self { root: root.into() } + } + + pub fn load<'de, P: AsRef, T: Deserialize<'de>>(&self, name: P) -> Result { + let name = name.as_ref(); + let mut path = self.root.join(name); + path.set_extension("xml"); + + let file = File::open(&path).with_context(|| format!("cannot open DB file: {:?}", path))?; + serde_xml_rs::de::from_reader(file) + .with_context(|| format!("cannot parse DB file: {:?}", path)) + } + + pub fn load_mcu<'de, P: AsRef, T: Deserialize<'de>>(&self, name: P) -> Result { + let mut mcu_path = PathBuf::new(); + mcu_path.push("mcu"); + mcu_path.push(name); + self.load(&mcu_path) + } +} diff --git a/codegen/src/cubemx/families.rs b/codegen/src/cubemx/families.rs new file mode 100644 index 000000000..98848e5d5 --- /dev/null +++ b/codegen/src/cubemx/families.rs @@ -0,0 +1,44 @@ +use crate::cubemx::Db; +use anyhow::{Context, Result}; +use serde::Deserialize; + +pub fn load(db: &Db) -> Result { + db.load_mcu("families") +} + +pub fn load_f3(db: &Db) -> Result { + load(db)? + .families + .into_iter() + .find(|f| f.name == "STM32F3") + .context("STM32F3 family not found") +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct Families { + #[serde(rename = "Family")] + pub families: Vec, +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct Family { + pub name: String, + #[serde(rename = "SubFamily")] + pub sub_families: Vec, +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct SubFamily { + pub name: String, + #[serde(rename = "Mcu")] + pub mcus: Vec, +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct Mcu { + pub name: String, +} diff --git a/codegen/src/cubemx/ip/gpio.rs b/codegen/src/cubemx/ip/gpio.rs new file mode 100644 index 000000000..4259d848a --- /dev/null +++ b/codegen/src/cubemx/ip/gpio.rs @@ -0,0 +1,92 @@ +use crate::cubemx::Db; +use anyhow::{bail, Context, Result}; +use once_cell::sync::Lazy; +use regex::Regex; +use serde::Deserialize; +use std::path::PathBuf; + +pub fn load(db: &Db, version: &str) -> Result { + let name = format!("GPIO-{}_Modes", version); + let ip_path: PathBuf = ["IP", &name].iter().collect(); + db.load_mcu(&ip_path) +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct Ip { + pub version: String, + #[serde(rename = "GPIO_Pin")] + pub pins: Vec, +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct Pin { + pub port_name: String, + pub name: String, + #[serde(rename = "PinSignal", default)] + pub pin_signals: Vec, +} + +impl Pin { + pub fn port(&self) -> Result { + static PORT_NAME: Lazy = Lazy::new(|| Regex::new(r"^P(?P[A-Z])$").unwrap()); + + let captures = PORT_NAME + .captures(&self.port_name) + .with_context(|| format!("invalid GPIO port name: {}", self.port_name))?; + + let id = captures.name("id").unwrap().as_str(); + let id = id.parse()?; + Ok(id) + } + + pub fn number(&self) -> Result { + static PIN_NAME: Lazy = + Lazy::new(|| Regex::new(r"^P[A-Z](?P\d{1,2})\b.*$").unwrap()); + + let captures = PIN_NAME + .captures(&self.name) + .with_context(|| format!("invalid GPIO pin name: {}", self.name))?; + + let id = captures.name("nr").unwrap().as_str(); + let id = id.parse()?; + Ok(id) + } +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct PinSignal { + pub name: String, + specific_parameter: SpecificParameter, +} + +impl PinSignal { + pub fn af(&self) -> Result { + let param = &self.specific_parameter; + if param.name == "GPIO_AF" { + parse_af(¶m.possible_value) + } else { + bail!("PinSignal is missing a GPIO_AF parameter") + } + } +} + +fn parse_af(s: &str) -> Result { + static AF: Lazy = Lazy::new(|| Regex::new(r"^GPIO_AF(?P\d{1,2})_\w+$").unwrap()); + + let captures = AF + .captures(s) + .with_context(|| format!("invalid PinSignal AF: {}", s))?; + + let nr = captures.name("nr").unwrap().as_str().parse()?; + Ok(nr) +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +struct SpecificParameter { + name: String, + possible_value: String, +} diff --git a/codegen/src/cubemx/ip/mod.rs b/codegen/src/cubemx/ip/mod.rs new file mode 100644 index 000000000..712931722 --- /dev/null +++ b/codegen/src/cubemx/ip/mod.rs @@ -0,0 +1 @@ +pub mod gpio; diff --git a/codegen/src/cubemx/mcu.rs b/codegen/src/cubemx/mcu.rs new file mode 100644 index 000000000..2255ef1aa --- /dev/null +++ b/codegen/src/cubemx/mcu.rs @@ -0,0 +1,22 @@ +use crate::cubemx::Db; +use anyhow::Result; +use serde::Deserialize; + +pub fn load(db: &Db, name: &str) -> Result { + db.load_mcu(name) +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct Mcu { + pub ref_name: String, + #[serde(rename = "IP")] + pub ips: Vec, +} + +#[derive(Debug, Deserialize, Eq, Ord, PartialEq, PartialOrd)] +#[serde(rename_all = "PascalCase")] +pub struct Ip { + pub name: String, + pub version: String, +} diff --git a/codegen/src/cubemx/mod.rs b/codegen/src/cubemx/mod.rs new file mode 100644 index 000000000..a507ea839 --- /dev/null +++ b/codegen/src/cubemx/mod.rs @@ -0,0 +1,40 @@ +pub mod families; +pub mod ip; +pub mod mcu; +pub mod package; + +mod db; + +pub use db::Db; + +use anyhow::Result; + +pub fn load_f3_mcus(db: &Db) -> Result> { + families::load_f3(db)? + .sub_families + .into_iter() + .flat_map(|subfamily| subfamily.mcus.into_iter()) + .map(|mcu_| mcu::load(db, &mcu_.name)) + .collect() +} + +pub fn load_f3_ips(db: &Db, ip_name: &str) -> Result> { + let f3_mcus = load_f3_mcus(db)?; + let mut ips: Vec<_> = f3_mcus + .into_iter() + .flat_map(|mcu| mcu.ips.into_iter()) + .filter(|ip| ip.name == ip_name) + .collect(); + + ips.sort(); + ips.dedup(); + + Ok(ips) +} + +pub fn load_f3_gpio_ips(db: &Db) -> Result> { + load_f3_ips(db, "GPIO")? + .into_iter() + .map(|ip_| ip::gpio::load(db, &ip_.version)) + .collect() +} diff --git a/codegen/src/cubemx/package.rs b/codegen/src/cubemx/package.rs new file mode 100644 index 000000000..83300f10f --- /dev/null +++ b/codegen/src/cubemx/package.rs @@ -0,0 +1,19 @@ +use crate::cubemx::Db; +use anyhow::Result; +use serde::Deserialize; + +pub fn load(db: &Db) -> Result { + db.load("package") +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct Package { + pub pack_description: PackDescription, +} + +#[derive(Debug, Deserialize)] +#[serde(rename_all = "PascalCase")] +pub struct PackDescription { + pub release: String, +} diff --git a/codegen/src/main.rs b/codegen/src/main.rs new file mode 100644 index 000000000..5c1dabecb --- /dev/null +++ b/codegen/src/main.rs @@ -0,0 +1,41 @@ +mod codegen; +mod cubemx; + +use anyhow::Result; +use cubemx::Db; +use std::path::PathBuf; +use structopt::StructOpt; + +#[derive(StructOpt)] +#[structopt(about = "Code generation for the stm32f3xx-hal crate")] +enum Command { + #[structopt(about = "Generate GPIO mappings from an STM32CubeMX database")] + Gpio { + #[structopt(parse(from_os_str), help = "Path of the STM32CubeMX MCU database")] + db_path: PathBuf, + }, +} + +fn main() -> Result<()> { + match Command::from_args() { + Command::Gpio { db_path } => handle_gpio(db_path), + } +} + +fn handle_gpio(db_path: PathBuf) -> Result<()> { + let db = cubemx::Db::new(db_path); + + emit_autogen_comment(&db)?; + + let gpio_ips = cubemx::load_f3_gpio_ips(&db)?; + codegen::gpio::gen_mappings(&gpio_ips)?; + + Ok(()) +} + +fn emit_autogen_comment(db: &Db) -> Result<()> { + let package = cubemx::package::load(&db)?; + codegen::gen_autogen_comment(&package); + + Ok(()) +} diff --git a/src/dma.rs b/src/dma.rs index 15ce3621d..c771522c6 100644 --- a/src/dma.rs +++ b/src/dma.rs @@ -59,7 +59,9 @@ impl Transfer { let (ptr, len) = unsafe { buffer.write_buffer() }; let len = u16(len).expect("buffer is too large"); - channel.set_memory_address(ptr as u32, Increment::Enable); + // NOTE(unsafe) We are using the address of a 'static WriteBuffer here, + // which is guaranteed to be safe for DMA. + unsafe { channel.set_memory_address(ptr as u32, Increment::Enable) }; channel.set_transfer_length(len); channel.set_word_size::(); channel.set_direction(Direction::FromPeripheral); @@ -84,7 +86,9 @@ impl Transfer { let (ptr, len) = unsafe { buffer.read_buffer() }; let len = u16(len).expect("buffer is too large"); - channel.set_memory_address(ptr as u32, Increment::Enable); + // NOTE(unsafe) We are using the address of a 'static ReadBuffer here, + // which is guaranteed to be safe for DMA. + unsafe { channel.set_memory_address(ptr as u32, Increment::Enable) }; channel.set_transfer_length(len); channel.set_word_size::(); channel.set_direction(Direction::FromMemory); @@ -266,7 +270,12 @@ pub trait Channel: private::Channel { /// # Panics /// /// Panics if this channel is enabled. - fn set_peripheral_address(&mut self, address: u32, inc: Increment) { + /// + /// # Safety + /// + /// Callers must ensure the given address is the address of a peripheral + /// register that supports DMA. + unsafe fn set_peripheral_address(&mut self, address: u32, inc: Increment) { assert!(!self.is_enabled()); self.ch().par.write(|w| w.pa().bits(address)); @@ -281,7 +290,12 @@ pub trait Channel: private::Channel { /// # Panics /// /// Panics if this channel is enabled. - fn set_memory_address(&mut self, address: u32, inc: Increment) { + /// + /// # Safety + /// + /// Callers must ensure the given address is a valid memory address + /// that will remain valid as long as at is used by DMA. + unsafe fn set_memory_address(&mut self, address: u32, inc: Increment) { assert!(!self.is_enabled()); self.ch().mar.write(|w| w.ma().bits(address)); diff --git a/src/gpio.rs b/src/gpio.rs index 0dbf16c2e..dad24ac89 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -126,8 +126,6 @@ pub struct AF15; macro_rules! gpio { ([ $({ - devices: [$($device:expr,)+], - devices_except: [$($device_except:expr,)*], GPIO: $GPIOX:ident, gpio: $gpiox:ident, gpio_mapped: $gpioy:ident, @@ -135,33 +133,18 @@ macro_rules! gpio { gpio_mapped_iorst: $iopxrst:ident, partially_erased_pin: $PXx:ident, pins: [ - $($PXi:ident: ($pxi:ident, $i:expr, $MODE:ty, $moderi:ident, $AFR:ident, $afri:ident, - $bsi:ident, $bri:ident, $odri:ident, $idri:ident, $pupdri:ident, $oti:ident, [ - $($AFi_common:ty: ($into_afi_common:ident, $afi_common:ident,),)* - ], [ - $($AFi:ty: ($into_afi:ident, $afi:ident, [$($afi_devices:expr,)*],),)* - ]),)+ + $($PXi:ident: ( + $pxi:ident, $i:expr, $MODE:ty, $moderi:ident, $AFR:ident, $afri:ident, + $bsi:ident, $bri:ident, $odri:ident, $idri:ident, $pupdri:ident, $oti:ident, + { $( $AFi:ty: ($into_afi:ident, $afi:ident), )* }, + ),)+ ], },)+ ]) => { - $( - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] - use crate::pac::$GPIOX; - )+ + $( use crate::pac::$GPIOX; )+ pub enum Gpio { - $( - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] - $GPIOX, - )+ + $( $GPIOX, )+ } /// Fully erased pin @@ -179,11 +162,6 @@ macro_rules! gpio { unsafe { match &self.gpio { $( - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] Gpio::$GPIOX => (*$GPIOX::ptr()).bsrr.write(|w| w.bits(1 << self.i)), )+ } @@ -196,11 +174,6 @@ macro_rules! gpio { unsafe { match &self.gpio { $( - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] Gpio::$GPIOX => (*$GPIOX::ptr()).bsrr.write(|w| w.bits(1 << (16 + self.i))), )+ } @@ -222,11 +195,6 @@ macro_rules! gpio { Ok(unsafe { match &self.gpio { $( - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] Gpio::$GPIOX => (*$GPIOX::ptr()).idr.read().bits() & (1 << self.i) == 0, )+ } @@ -247,11 +215,6 @@ macro_rules! gpio { Ok(unsafe { match &self.gpio { $( - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] Gpio::$GPIOX => (*$GPIOX::ptr()).idr.read().bits() & (1 << self.i) == 0, )+ } @@ -270,11 +233,6 @@ macro_rules! gpio { Ok(unsafe { match &self.gpio { $( - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] Gpio::$GPIOX => (*$GPIOX::ptr()).odr.read().bits() & (1 << self.i) == 0, )+ } @@ -287,11 +245,6 @@ macro_rules! gpio { $( /// GPIO - #[cfg(all(any( - $(feature = $device,)+ - ), not(any( - $(feature = $device_except,)* - ))))] pub mod $gpiox { use core::marker::PhantomData; use core::convert::Infallible; @@ -503,22 +456,6 @@ macro_rules! gpio { impl $PXi { $( /// Configures the pin to serve as a specific alternate function - pub fn $into_afi_common( - self, - moder: &mut MODER, - afr: &mut $AFR, - ) -> $PXi<$AFi_common> { - moder.moder().modify(|_, w| w.$moderi().alternate()); - afr.afr().modify(|_, w| w.$afri().$afi_common()); - $PXi { _mode: PhantomData } - } - )* - - $( - /// Configures the pin to serve as a specific alternate function - #[cfg(any( - $(feature = $afi_devices,)* - ))] pub fn $into_afi( self, moder: &mut MODER, @@ -696,1723 +633,599 @@ macro_rules! gpio { )+ } )+ - } + }; + + ([ + $({ + port: ($X:ident/$x:ident, pac: $gpioy:ident), + pins: [ + $( $i:expr => { + reset: $mode:ty, + afr: $LH:ident/$lh:ident, + af: [$( $af:expr ),*] + }, )+ + ], + },)+ + ]) => { + paste::item! { + gpio!([ + $({ + GPIO: [], + gpio: [], + gpio_mapped: $gpioy, + gpio_mapped_ioenr: [], + gpio_mapped_iorst: [], + partially_erased_pin: [

], + pins: [ + $([

]: ( + [

], $i, $mode, [], [], [], + [], [
], [], [], [], [], + { $( []: ([], []), )* }, + ),)+ + ], + },)+ + ]); + } + }; } +// auto-generated using codegen +// STM32CubeMX DB release: DB.6.0.0 +#[cfg(feature = "gpio-f302")] gpio!([ { - devices: [ - "stm32f301", - "stm32f318", - "stm32f302", - "stm32f303", - "stm32f373", - "stm32f378", - "stm32f334", - "stm32f328", - "stm32f358", - "stm32f398", - ], - devices_except: [], - GPIO: GPIOA, - gpio: gpioa, - gpio_mapped: gpioa, - gpio_mapped_ioenr: iopaen, - gpio_mapped_iorst: ioparst, - partially_erased_pin: PAx, + port: (A/a, pac: gpioa), pins: [ - PA0: (pa0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF8: (into_af8, af8, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF11: (into_af11, af11, ["stm32f373", "stm32f378",],), - ]), - PA1: (pa1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF15: (into_af15, af15,), - ], [ - AF0: (into_af0, af0, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF6: (into_af6, af6, ["stm32f373", "stm32f378",],), - AF11: (into_af11, af11, ["stm32f373", "stm32f378",],), - ]), - PA2: (pa2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF8: (into_af8, af8,), - AF9: (into_af9, af9,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF6: (into_af6, af6, ["stm32f373", "stm32f378",],), - AF11: (into_af11, af11, ["stm32f373", "stm32f378",],), - ]), - PA3: (pa3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF6: (into_af6, af6, ["stm32f373", "stm32f378",],), - AF11: (into_af11, af11, ["stm32f373", "stm32f378",],), - ]), - PA4: (pa4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe","stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f373", "stm32f378",],), - ]), - PA5: (pa5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF15: (into_af15, af15,), - ], [ - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f373", "stm32f378",],), - AF9: (into_af9, af9, ["stm32f373", "stm32f378",],), - AF10: (into_af10, af10, ["stm32f373", "stm32f378",],), - ]), - PA6: (pa6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f373", "stm32f378",],), - AF13: (into_af13, af13, ["stm32f334", "stm32f328",],), - ]), - PA7: (pa7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f373", "stm32f378", "stm32f358",],), - AF9: (into_af9, af9, ["stm32f373", "stm32f378",],), - ]), - PA8: (pa8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [ - AF0: (into_af0, af0,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF3: (into_af3, af3, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f303", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PA9: (pa9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [ - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF10: (into_af10, af10,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f373", "stm32f378", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PA10: (pa10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF10: (into_af10, af10,), - AF15: (into_af15, af15,), - ], [ - AF4: (into_af4, af4, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f373", "stm32f378", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f373", "stm32f378",],), - AF11: (into_af11, af11, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PA11: (pa11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [ - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f373", "stm32f378", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF11: (into_af11, af11, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - AF14: (into_af14, af14, ["stm32f302", "stm32f303xb", "stm32f303xc",],), - ]), - PA12: (pa12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [ - AF1: (into_af1, af1,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF8: (into_af8, af8,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF11: (into_af11, af11, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - AF14: (into_af14, af14, ["stm32f302", "stm32f303xb", "stm32f303xc",],), - ]), - PA13: (pa13, 13, AF0, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF6: (into_af6, af6, ["stm32f373", "stm32f378", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - ]), - PA14: (pa14, 14, AF0, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [ - AF0: (into_af0, af0,), - AF3: (into_af3, af3,), - AF4: (into_af4, af4,), - AF15: (into_af15, af15,), - ], [ - AF5: (into_af5, af5, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f373", "stm32f378",],), - ]), - PA15: (pa15, 15, AF0, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF4: (into_af4, af4,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f303x6", "stm32f303x8", "stm32f318", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f373", "stm32f378",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), + 0 => { reset: Input, afr: L/l, af: [1, 3, 7, 15] }, + 1 => { reset: Input, afr: L/l, af: [0, 1, 3, 7, 9, 15] }, + 2 => { reset: Input, afr: L/l, af: [1, 3, 7, 8, 9, 15] }, + 3 => { reset: Input, afr: L/l, af: [1, 3, 7, 9, 15] }, + 4 => { reset: Input, afr: L/l, af: [3, 6, 7, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 3, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 3, 6, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 3, 6, 15] }, + 8 => { reset: Input, afr: H/h, af: [0, 3, 4, 5, 6, 7, 15] }, + 9 => { reset: Input, afr: H/h, af: [2, 3, 4, 5, 6, 7, 9, 10, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 4, 5, 6, 7, 8, 10, 15] }, + 11 => { reset: Input, afr: H/h, af: [5, 6, 7, 9, 11, 12, 15] }, + 12 => { reset: Input, afr: H/h, af: [1, 5, 6, 7, 8, 9, 11, 15] }, + 13 => { reset: AF0, afr: H/h, af: [0, 1, 3, 5, 7, 15] }, + 14 => { reset: AF0, afr: H/h, af: [0, 3, 4, 6, 7, 15] }, + 15 => { reset: AF0, afr: H/h, af: [0, 1, 3, 4, 6, 7, 9, 15] }, ], }, { - devices: [ - "stm32f301", - "stm32f318", - "stm32f302", - "stm32f303", - "stm32f334", - "stm32f328", - "stm32f358", - "stm32f398", - ], - devices_except: [], - GPIO: GPIOB, - gpio: gpiob, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopben, - gpio_mapped_iorst: iopbrst, - partially_erased_pin: PBx, + port: (B/b, pac: gpiob), pins: [ - PB0: (pb0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF3: (into_af3, af3,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - ]), - PB1: (pb1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF3: (into_af3, af3,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB2: (pb2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [], [ - AF3: (into_af3, af3, ["stm32f301", "stm32f302", "stm32f303", "stm32f334",],), - AF13: (into_af13, af13, ["stm32f334",],), - AF15: (into_af15, af15, ["stm32f301", "stm32f302", "stm32f303", "stm32f334",],), - ]), - PB3: (pb3, 3, AF0, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f334",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB4: (pb4, 4, AF0, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF10: (into_af10, af10,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB5: (pb5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [ - AF1: (into_af1, af1,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - AF10: (into_af10, af10,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB6: (pb6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f334",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB7: (pb7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB8: (pb8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF4: (into_af4, af4,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f334", "stm32f328", "stm32f398",],), - AF8: (into_af8, af8, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB9: (pb9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [ - AF1: (into_af1, af1,), - AF4: (into_af4, af4,), - AF6: (into_af6, af6,), - AF8: (into_af8, af8,), - AF15: (into_af15, af15,), - ], [ - AF2: (into_af2, af2, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f303xd", "stm32f303xe", "stm32f318", "stm32f334", "stm32f328", "stm32f398",],), - AF9: (into_af9, af9, ["stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF10: (into_af10, af10, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB10: (pb10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB11: (pb11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - AF15: (into_af15, af15, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - ]), - PB12: (pb12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [], [ - AF3: (into_af3, af3, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - AF15: (into_af15, af15, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - ]), - PB13: (pb13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [], [ - AF3: (into_af3, af3, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - AF15: (into_af15, af15, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - ]), - PB14: (pb14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], [ - AF5: (into_af5, af5, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), - PB15: (pb15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF15: (into_af15, af15,), - ], [ - AF0: (into_af0, af0, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f301", "stm32f318", "stm32f302", "stm32f303", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f318", "stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", "stm32f358", "stm32f398",],), - AF13: (into_af13, af13, ["stm32f334",],), - ]), + 0 => { reset: Input, afr: L/l, af: [3, 6, 15] }, + 1 => { reset: Input, afr: L/l, af: [3, 6, 8, 15] }, + 2 => { reset: Input, afr: L/l, af: [3, 15] }, + 3 => { reset: AF0, afr: L/l, af: [0, 1, 3, 6, 7, 15] }, + 4 => { reset: AF0, afr: L/l, af: [0, 1, 3, 6, 7, 10, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 4, 6, 7, 8, 10, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 3, 4, 7, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 3, 4, 7, 15] }, + 8 => { reset: Input, afr: H/h, af: [1, 3, 4, 7, 9, 12, 15] }, + 9 => { reset: Input, afr: H/h, af: [1, 4, 6, 7, 8, 9, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 7, 15] }, + 11 => { reset: Input, afr: H/h, af: [1, 3, 7, 15] }, + 12 => { reset: Input, afr: H/h, af: [3, 4, 5, 6, 7, 15] }, + 13 => { reset: Input, afr: H/h, af: [3, 5, 6, 7, 15] }, + 14 => { reset: Input, afr: H/h, af: [1, 3, 5, 6, 7, 15] }, + 15 => { reset: Input, afr: H/h, af: [0, 1, 2, 4, 5, 15] }, ], }, { - devices: [ - "stm32f373", - "stm32f378", - ], - devices_except: [], - GPIO: GPIOB, - gpio: gpiob, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopben, - gpio_mapped_iorst: iopbrst, - partially_erased_pin: PBx, + port: (C/c, pac: gpioc), pins: [ - PB0: (pb0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF10: (into_af10, af10,), - AF15: (into_af15, af15,), - ], []), - PB1: (pb1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF15: (into_af15, af15,), - ], []), - PB2: (pb2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF15: (into_af15, af15,), - ], []), - PB3: (pb3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF10: (into_af10, af10,), - AF15: (into_af15, af15,), - ], []), - PB4: (pb4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF10: (into_af10, af10,), - AF15: (into_af15, af15,), - ], []), - PB5: (pb5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF4: (into_af4, af4,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF10: (into_af10, af10,), - AF11: (into_af11, af11,), - AF15: (into_af15, af15,), - ], []), - PB6: (pb6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF10: (into_af10, af10,), - AF11: (into_af11, af11,), - AF15: (into_af15, af15,), - ], []), - PB7: (pb7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF10: (into_af10, af10,), - AF11: (into_af11, af11,), - AF15: (into_af15, af15,), - ], []), - PB8: (pb8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF4: (into_af4, af4,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF8: (into_af8, af8,), - AF9: (into_af9, af9,), - AF11: (into_af11, af11,), - AF15: (into_af15, af15,), - ], []), - PB9: (pb9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF4: (into_af4, af4,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF8: (into_af8, af8,), - AF9: (into_af9, af9,), - AF11: (into_af11, af11,), - AF15: (into_af15, af15,), - ], []), - PB10: (pb10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], []), - PB11: (pb11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - AF7: (into_af7, af7,), - AF15: (into_af15, af15,), - ], []), - PB14: (pb14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF7: (into_af7, af7,), - AF9: (into_af9, af9,), - AF15: (into_af15, af15,), - ], []), - PB15: (pb15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - AF9: (into_af9, af9,), - AF15: (into_af15, af15,), - ], []), + 0 => { reset: Input, afr: L/l, af: [1, 2] }, + 1 => { reset: Input, afr: L/l, af: [1, 2] }, + 2 => { reset: Input, afr: L/l, af: [1, 2] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 6] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 3, 7] }, + 6 => { reset: Input, afr: L/l, af: [1, 6, 7] }, + 7 => { reset: Input, afr: L/l, af: [1, 6] }, + 8 => { reset: Input, afr: H/h, af: [1] }, + 9 => { reset: Input, afr: H/h, af: [1, 3, 5] }, + 10 => { reset: Input, afr: H/h, af: [1, 6, 7] }, + 11 => { reset: Input, afr: H/h, af: [1, 6, 7] }, + 12 => { reset: Input, afr: H/h, af: [1, 6, 7] }, + 13 => { reset: Input, afr: H/h, af: [4] }, + 14 => { reset: Input, afr: H/h, af: [] }, + 15 => { reset: Input, afr: H/h, af: [] }, ], }, { - devices: [ - "stm32f301", - "stm32f318", - "stm32f373", - "stm32f378", - "stm32f334", - "stm32f328", - "stm32f358", - "stm32f398", - ], - devices_except: [], - GPIO: GPIOC, - gpio: gpioc, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopcen, - gpio_mapped_iorst: iopcrst, - partially_erased_pin: PCx, + port: (D/d, pac: gpioc), pins: [ - PC0: (pc0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f398",],), - ]), - PC1: (pc1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f398",],), - ]), - PC2: (pc2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - ]), - PC3: (pc3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f334", "stm32f358", "stm32f398",],), - ]), - PC4: (pc4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - ]), - PC5: (pc5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f301", "stm32f334", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - ]), - PC6: (pc6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f334",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f334", "stm32f358", "stm32f398",],), - ]), - PC7: (pc7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f334",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f358", "stm32f398",],), - ]), - PC8: (pc8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f334",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f358", "stm32f398",],), - ]), - PC9: (pc9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f301", "stm32f334", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f301", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f358", "stm32f398",],), - ]), - PC10: (pc10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - ]), - PC11: (pc11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF3: (into_af3, af3, ["stm32f334",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - ]), - PC12: (pc12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [], [ - AF1: (into_af1, af1, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF3: (into_af3, af3, ["stm32f334",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f301", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f301", "stm32f373", "stm32f378", "stm32f334", "stm32f358", "stm32f398",],), - ]), - PC13: (pc13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF4: (into_af4, af4, ["stm32f301", "stm32f318", "stm32f334", "stm32f328", "stm32f358", "stm32f398",],), - ]), - PC14: (pc14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - ]), - PC15: (pc15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - ]), + 2 => { reset: Input, afr: L/l, af: [1] }, ], }, { - devices: [ - "stm32f302", - "stm32f303", - ], - devices_except: [], - GPIO: GPIOC, - gpio: gpioc, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopcen, - gpio_mapped_iorst: iopcrst, - partially_erased_pin: PCx, + port: (F/f, pac: gpioc), pins: [ - PC0: (pc0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF1: (into_af1, af1,), - ], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe",],), - ]), - PC1: (pc1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - ], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe",],), - ]), - PC2: (pc2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - ], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe", "stm32f303x6", "stm32f303x8",],), - AF3: (into_af3, af3, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC3: (pc3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [ - AF1: (into_af1, af1,), - AF6: (into_af6, af6,), - ], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe", "stm32f303x6", "stm32f303x8",],), - ]), - PC4: (pc4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF1: (into_af1, af1,), - AF7: (into_af7, af7,), - ], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe", "stm32f303x6", "stm32f303x8",],), - ]), - PC5: (pc5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF7: (into_af7, af7,), - ], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe", "stm32f303x6", "stm32f303x8",],), - ]), - PC6: (pc6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF7: (into_af7, af7,), - ], [ - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC7: (pc7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF7: (into_af7, af7, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC8: (pc8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF7: (into_af7, af7, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC9: (pc9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF3: (into_af3, af3, ["stm32f303xd", "stm32f303xe",],), - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe", ],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC10: (pc10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF7: (into_af7, af7,), - ], [ - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC11: (pc11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [ - AF1: (into_af1, af1,), - AF7: (into_af7, af7,), - ], [ - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC12: (pc12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [ - AF1: (into_af1, af1,), - AF7: (into_af7, af7,), - ], [ - AF4: (into_af4, af4, ["stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f302", "stm32f303xb", "stm32f303xc", "stm32f303xd", "stm32f303xe",],), - ]), - PC13: (pc13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [ - AF4: (into_af4, af4,), - ], [ - AF1: (into_af1, af1, ["stm32f303xd", "stm32f303xe",],), - ]), - PC14: (pc14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [], [ - AF1: (into_af1, af1, ["stm32f303xd", "stm32f303xe",],), - ]), - PC15: (pc15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [], [ - AF1: (into_af1, af1, ["stm32f303xd", "stm32f303xe",],), - ]), + 0 => { reset: Input, afr: L/l, af: [4, 5, 6] }, + 1 => { reset: Input, afr: L/l, af: [4, 5] }, ], }, +]); + +#[cfg(feature = "gpio-f303e")] +gpio!([ { - devices: [ - "stm32f301", - ], - devices_except: [], - GPIO: GPIOD, - gpio: gpiod, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopden, - gpio_mapped_iorst: iopdrst, - partially_erased_pin: PDx, + port: (A/a, pac: gpioa), pins: [ - PD2: (pd2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - ], []), + 0 => { reset: Input, afr: L/l, af: [1, 3, 7, 8, 9, 10, 15] }, + 1 => { reset: Input, afr: L/l, af: [0, 1, 3, 7, 9, 15] }, + 2 => { reset: Input, afr: L/l, af: [1, 3, 7, 8, 9, 15] }, + 3 => { reset: Input, afr: L/l, af: [1, 3, 7, 9, 15] }, + 4 => { reset: Input, afr: L/l, af: [2, 3, 5, 6, 7, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 3, 5, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 8, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 15] }, + 8 => { reset: Input, afr: H/h, af: [0, 3, 4, 5, 6, 7, 8, 10, 15] }, + 9 => { reset: Input, afr: H/h, af: [2, 3, 4, 5, 6, 7, 8, 9, 10, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 4, 5, 6, 7, 8, 10, 11, 15] }, + 11 => { reset: Input, afr: H/h, af: [5, 6, 7, 8, 9, 10, 11, 12, 15] }, + 12 => { reset: Input, afr: H/h, af: [1, 5, 6, 7, 8, 9, 10, 11, 15] }, + 13 => { reset: AF0, afr: H/h, af: [0, 1, 3, 5, 7, 10, 15] }, + 14 => { reset: AF0, afr: H/h, af: [0, 3, 4, 5, 6, 7, 15] }, + 15 => { reset: AF0, afr: H/h, af: [0, 1, 2, 3, 4, 5, 6, 7, 9, 15] }, ], }, { - devices: [ - "stm32f303", - ], - devices_except: [ - "stm32f303xb", - "stm32f303xc", - "stm32f303xd", - "stm32f303xe", - ], - GPIO: GPIOD, - gpio: gpiod, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopden, - gpio_mapped_iorst: iopdrst, - partially_erased_pin: PDx, + port: (B/b, pac: gpiob), pins: [ - PD2: (pd2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], []), + 0 => { reset: Input, afr: L/l, af: [2, 3, 4, 6, 15] }, + 1 => { reset: Input, afr: L/l, af: [2, 3, 4, 6, 8, 15] }, + 2 => { reset: Input, afr: L/l, af: [3, 15] }, + 3 => { reset: AF0, afr: L/l, af: [0, 1, 2, 3, 4, 5, 6, 7, 10, 15] }, + 4 => { reset: AF0, afr: L/l, af: [0, 1, 2, 3, 4, 5, 6, 7, 10, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 7, 8, 10, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 7, 10, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 7, 10, 12, 15] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 3, 4, 7, 8, 9, 10, 12, 15] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 4, 6, 7, 8, 9, 10, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 7, 15] }, + 11 => { reset: Input, afr: H/h, af: [1, 3, 7, 15] }, + 12 => { reset: Input, afr: H/h, af: [3, 4, 5, 6, 7, 15] }, + 13 => { reset: Input, afr: H/h, af: [3, 5, 6, 7, 15] }, + 14 => { reset: Input, afr: H/h, af: [1, 3, 5, 6, 7, 15] }, + 15 => { reset: Input, afr: H/h, af: [0, 1, 2, 4, 5, 15] }, ], }, { - devices: [ - "stm32f334", - ], - devices_except: [], - GPIO: GPIOD, - gpio: gpiod, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopden, - gpio_mapped_iorst: iopdrst, - partially_erased_pin: PDx, + port: (C/c, pac: gpioc), pins: [ - PD0: (pd0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [], []), - PD1: (pd1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [], []), - PD2: (pd2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], []), - PD3: (pd3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [], []), - PD4: (pd4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [], []), - PD5: (pd5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], []), - PD6: (pd6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [], []), - PD7: (pd7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [], []), - PD8: (pd8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [], []), - PD9: (pd9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], []), - PD10: (pd10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [], []), - PD11: (pd11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [], []), - PD12: (pd12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [], []), - PD13: (pd13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [], []), - PD14: (pd14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [], []), - PD15: (pd15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [], []), + 0 => { reset: Input, afr: L/l, af: [1, 2] }, + 1 => { reset: Input, afr: L/l, af: [1, 2] }, + 2 => { reset: Input, afr: L/l, af: [1, 2, 3] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 6] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 3, 7] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 4, 6, 7] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 4, 6, 7] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 4, 7] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 3, 4, 5, 6] }, + 10 => { reset: Input, afr: H/h, af: [1, 4, 5, 6, 7] }, + 11 => { reset: Input, afr: H/h, af: [1, 4, 5, 6, 7] }, + 12 => { reset: Input, afr: H/h, af: [1, 4, 5, 6, 7] }, + 13 => { reset: Input, afr: H/h, af: [1, 4] }, + 14 => { reset: Input, afr: H/h, af: [1] }, + 15 => { reset: Input, afr: H/h, af: [1] }, ], }, { - devices: [ - "stm32f302", - "stm32f303xb", - "stm32f303xc", - "stm32f303xd", - "stm32f303xe", - "stm32f373", - "stm32f378", - "stm32f328", - "stm32f358", - "stm32f398", - ], - devices_except: [], - GPIO: GPIOD, - gpio: gpiod, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopden, - gpio_mapped_iorst: iopdrst, - partially_erased_pin: PDx, + port: (D/d, pac: gpioc), pins: [ - PD0: (pd0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD1: (pd1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f373", "stm32f378",],), - AF4: (into_af4, af4, ["stm32f303", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f303", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD2: (pd2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f328", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f328", "stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f303", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f302", "stm32f303", "stm32f358", "stm32f398",],), - ]), - PD3: (pd3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD4: (pd4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD5: (pd5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD6: (pd6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD7: (pd7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD8: (pd8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f373", "stm32f378",],), - AF5: (into_af5, af5, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD9: (pd9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f373", "stm32f378",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD10: (pd10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD11: (pd11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD12: (pd12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD13: (pd13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD14: (pd14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), - PD15: (pd15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [], [ - AF1: (into_af1, af1, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f302", "stm32f303", "stm32f373", "stm32f378", "stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f302", "stm32f303", "stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe", "stm32f398",],), - ]), + 0 => { reset: Input, afr: L/l, af: [1, 7, 12] }, + 1 => { reset: Input, afr: L/l, af: [1, 4, 6, 7, 12] }, + 2 => { reset: Input, afr: L/l, af: [1, 2, 4, 5] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 7, 12] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 7, 12] }, + 5 => { reset: Input, afr: L/l, af: [1, 7, 12] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 7, 12] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 7, 12] }, + 8 => { reset: Input, afr: H/h, af: [1, 7, 12] }, + 9 => { reset: Input, afr: H/h, af: [1, 7, 12] }, + 10 => { reset: Input, afr: H/h, af: [1, 7, 12] }, + 11 => { reset: Input, afr: H/h, af: [1, 7, 12] }, + 12 => { reset: Input, afr: H/h, af: [1, 2, 3, 7, 12] }, + 13 => { reset: Input, afr: H/h, af: [1, 2, 3, 12] }, + 14 => { reset: Input, afr: H/h, af: [1, 2, 3, 12] }, + 15 => { reset: Input, afr: H/h, af: [1, 2, 3, 6, 12] }, ], }, { - devices: [ - "stm32f302", - "stm32f303xb", - "stm32f303xc", - "stm32f303xd", - "stm32f303xe", - ], - devices_except: [], - GPIO: GPIOE, - gpio: gpioe, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopeen, - gpio_mapped_iorst: ioperst, - partially_erased_pin: PEx, + port: (E/e, pac: gpioc), pins: [ - PE0: (pe0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - ], [ - AF6: (into_af6, af6, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE1: (pe1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF1: (into_af1, af1,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - ], [ - AF6: (into_af6, af6, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE2: (pe2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE3: (pe3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE4: (pe4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE5: (pe5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF3: (into_af3, af3,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE6: (pe6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF0: (into_af0, af0,), - AF1: (into_af1, af1,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF6: (into_af6, af6, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE7: (pe7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE8: (pe8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE9: (pe9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE10: (pe10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE11: (pe11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE12: (pe12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE13: (pe13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE14: (pe14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF6: (into_af6, af6,), - ], [ - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PE15: (pe15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF7: (into_af7, af7,), - ], [ - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), + 0 => { reset: Input, afr: L/l, af: [1, 2, 4, 6, 7, 12] }, + 1 => { reset: Input, afr: L/l, af: [1, 4, 6, 7, 12] }, + 2 => { reset: Input, afr: L/l, af: [0, 1, 2, 3, 5, 6, 12] }, + 3 => { reset: Input, afr: L/l, af: [0, 1, 2, 3, 5, 6, 12] }, + 4 => { reset: Input, afr: L/l, af: [0, 1, 2, 3, 5, 6, 12] }, + 5 => { reset: Input, afr: L/l, af: [0, 1, 2, 3, 5, 6, 12] }, + 6 => { reset: Input, afr: L/l, af: [0, 1, 5, 6, 12] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 12] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 12] }, + 10 => { reset: Input, afr: H/h, af: [1, 2, 12] }, + 11 => { reset: Input, afr: H/h, af: [1, 2, 5, 12] }, + 12 => { reset: Input, afr: H/h, af: [1, 2, 5, 12] }, + 13 => { reset: Input, afr: H/h, af: [1, 2, 5, 12] }, + 14 => { reset: Input, afr: H/h, af: [1, 2, 5, 6, 12] }, + 15 => { reset: Input, afr: H/h, af: [1, 2, 7, 12] }, ], }, { - devices: [ - "stm32f328", - "stm32f358", - "stm32f373", - "stm32f378", - "stm32f398", - ], - devices_except: [], - GPIO: GPIOE, - gpio: gpioe, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopeen, - gpio_mapped_iorst: ioperst, - partially_erased_pin: PEx, + port: (F/f, pac: gpioc), pins: [ - PE0: (pe0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f398",],), - AF7: (into_af7, af7, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE1: (pe1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF6: (into_af6, af6, ["stm32f398",],), - AF7: (into_af7, af7, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE2: (pe2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [], [ - AF0: (into_af0, af0, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF6: (into_af6, af6, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE3: (pe3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [], [ - AF0: (into_af0, af0, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF6: (into_af6, af6, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE4: (pe4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [], [ - AF0: (into_af0, af0, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF6: (into_af6, af6, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE5: (pe5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], [ - AF0: (into_af0, af0, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF6: (into_af6, af6, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE6: (pe6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [], [ - AF0: (into_af0, af0, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF6: (into_af6, af6, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE7: (pe7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE8: (pe8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE9: (pe9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE10: (pe10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE11: (pe11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE12: (pe12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE13: (pe13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE14: (pe14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF6: (into_af6, af6, ["stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PE15: (pe15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f358", "stm32f373", "stm32f378", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), + 0 => { reset: Input, afr: L/l, af: [1, 4, 5, 6] }, + 1 => { reset: Input, afr: L/l, af: [1, 4, 5] }, + 2 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 3, 12] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 4, 7, 12] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 12] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 3, 5, 12] }, + 10 => { reset: Input, afr: H/h, af: [1, 2, 3, 5, 12] }, + 11 => { reset: Input, afr: H/h, af: [1, 2] }, + 12 => { reset: Input, afr: H/h, af: [1, 2, 12] }, + 13 => { reset: Input, afr: H/h, af: [1, 2, 12] }, + 14 => { reset: Input, afr: H/h, af: [1, 2, 12] }, + 15 => { reset: Input, afr: H/h, af: [1, 2, 12] }, ], }, { - devices: [ - "stm32f301", - "stm32f318", + port: (G/g, pac: gpioc), + pins: [ + 0 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 1 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 2 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 6 => { reset: Input, afr: L/l, af: [1, 12] }, + 7 => { reset: Input, afr: L/l, af: [1, 12] }, + 8 => { reset: Input, afr: H/h, af: [1] }, + 9 => { reset: Input, afr: H/h, af: [1, 12] }, + 10 => { reset: Input, afr: H/h, af: [1, 12] }, + 11 => { reset: Input, afr: H/h, af: [1, 12] }, + 12 => { reset: Input, afr: H/h, af: [1, 12] }, + 13 => { reset: Input, afr: H/h, af: [1, 12] }, + 14 => { reset: Input, afr: H/h, af: [1, 12] }, + 15 => { reset: Input, afr: H/h, af: [1] }, ], - devices_except: [], - GPIO: GPIOF, - gpio: gpiof, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopfen, - gpio_mapped_iorst: iopfrst, - partially_erased_pin: PFx, + }, + { + port: (H/h, pac: gpioc), pins: [ - PF0: (pf0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF4: (into_af4, af4,), - AF5: (into_af5, af5,), - AF6: (into_af6, af6,), - ], []), - PF1: (pf1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF4: (into_af4, af4,), - AF5: (into_af5, af5,), - ], []), + 0 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 1 => { reset: Input, afr: L/l, af: [1, 2, 12] }, + 2 => { reset: Input, afr: L/l, af: [1] }, ], }, +]); + +#[cfg(feature = "gpio-f303")] +gpio!([ { - devices: [ - "stm32f303", + port: (A/a, pac: gpioa), + pins: [ + 0 => { reset: Input, afr: L/l, af: [1, 3, 7, 8, 9, 10, 15] }, + 1 => { reset: Input, afr: L/l, af: [0, 1, 3, 7, 9, 15] }, + 2 => { reset: Input, afr: L/l, af: [1, 3, 7, 8, 9, 15] }, + 3 => { reset: Input, afr: L/l, af: [1, 3, 7, 9, 15] }, + 4 => { reset: Input, afr: L/l, af: [2, 3, 5, 6, 7, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 3, 5, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 8, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 8, 15] }, + 8 => { reset: Input, afr: H/h, af: [0, 4, 5, 6, 7, 8, 10, 15] }, + 9 => { reset: Input, afr: H/h, af: [3, 4, 5, 6, 7, 8, 9, 10, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 4, 6, 7, 8, 10, 11, 15] }, + 11 => { reset: Input, afr: H/h, af: [6, 7, 8, 9, 10, 11, 12, 14, 15] }, + 12 => { reset: Input, afr: H/h, af: [1, 6, 7, 8, 9, 10, 11, 14, 15] }, + 13 => { reset: AF0, afr: H/h, af: [0, 1, 3, 5, 7, 10, 15] }, + 14 => { reset: AF0, afr: H/h, af: [0, 3, 4, 5, 6, 7, 15] }, + 15 => { reset: AF0, afr: H/h, af: [0, 1, 2, 4, 5, 6, 7, 9, 15] }, ], - devices_except: [ - "stm32f303xb", - "stm32f303xc", - "stm32f303xd", - "stm32f303xe", + }, + { + port: (B/b, pac: gpiob), + pins: [ + 0 => { reset: Input, afr: L/l, af: [2, 3, 4, 6, 15] }, + 1 => { reset: Input, afr: L/l, af: [2, 3, 4, 6, 8, 15] }, + 2 => { reset: Input, afr: L/l, af: [3, 15] }, + 3 => { reset: AF0, afr: L/l, af: [0, 1, 2, 3, 4, 5, 6, 7, 10, 15] }, + 4 => { reset: AF0, afr: L/l, af: [0, 1, 2, 3, 4, 5, 6, 7, 10, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 7, 10, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 6, 7, 10, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 5, 7, 10, 15] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 3, 4, 8, 9, 10, 12, 15] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 4, 6, 8, 9, 10, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 7, 15] }, + 11 => { reset: Input, afr: H/h, af: [1, 3, 7, 15] }, + 12 => { reset: Input, afr: H/h, af: [3, 4, 5, 6, 7, 15] }, + 13 => { reset: Input, afr: H/h, af: [3, 5, 6, 7, 15] }, + 14 => { reset: Input, afr: H/h, af: [1, 3, 5, 6, 7, 15] }, + 15 => { reset: Input, afr: H/h, af: [0, 1, 2, 4, 5, 15] }, ], - GPIO: GPIOF, - gpio: gpiof, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopfen, - gpio_mapped_iorst: iopfrst, - partially_erased_pin: PFx, + }, + { + port: (C/c, pac: gpioc), pins: [ - PF0: (pf0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF6: (into_af6, af6,), - ], []), - PF1: (pf1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [], []), + 0 => { reset: Input, afr: L/l, af: [1] }, + 1 => { reset: Input, afr: L/l, af: [1] }, + 2 => { reset: Input, afr: L/l, af: [1, 3] }, + 3 => { reset: Input, afr: L/l, af: [1, 6] }, + 4 => { reset: Input, afr: L/l, af: [1, 7] }, + 5 => { reset: Input, afr: L/l, af: [1, 3, 7] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 4, 6, 7] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 4, 6, 7] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 4, 7] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 4, 5, 6] }, + 10 => { reset: Input, afr: H/h, af: [1, 4, 5, 6, 7] }, + 11 => { reset: Input, afr: H/h, af: [1, 4, 5, 6, 7] }, + 12 => { reset: Input, afr: H/h, af: [1, 4, 5, 6, 7] }, + 13 => { reset: Input, afr: H/h, af: [4] }, + 14 => { reset: Input, afr: H/h, af: [] }, + 15 => { reset: Input, afr: H/h, af: [] }, ], }, { - devices: [ - "stm32f302", + port: (D/d, pac: gpioc), + pins: [ + 0 => { reset: Input, afr: L/l, af: [1, 7] }, + 1 => { reset: Input, afr: L/l, af: [1, 4, 6, 7] }, + 2 => { reset: Input, afr: L/l, af: [1, 2, 4, 5] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 5 => { reset: Input, afr: L/l, af: [1, 7] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 8 => { reset: Input, afr: H/h, af: [1, 7] }, + 9 => { reset: Input, afr: H/h, af: [1, 7] }, + 10 => { reset: Input, afr: H/h, af: [1, 7] }, + 11 => { reset: Input, afr: H/h, af: [1, 7] }, + 12 => { reset: Input, afr: H/h, af: [1, 2, 3, 7] }, + 13 => { reset: Input, afr: H/h, af: [1, 2, 3] }, + 14 => { reset: Input, afr: H/h, af: [1, 2, 3] }, + 15 => { reset: Input, afr: H/h, af: [1, 2, 3, 6] }, ], - devices_except: [], - GPIO: GPIOF, - gpio: gpiof, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopfen, - gpio_mapped_iorst: iopfrst, - partially_erased_pin: PFx, + }, + { + port: (E/e, pac: gpioc), pins: [ - PF0: (pf0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF4: (into_af4, af4,), - AF6: (into_af6, af6,), - ], []), - PF1: (pf1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF4: (into_af4, af4,), - ], []), - PF2: (pf2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - ], []), - PF4: (pf4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], []), - PF5: (pf5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], []), - PF6: (pf6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - ], []), - PF9: (pf9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], []), - PF10: (pf10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - ], []), + 0 => { reset: Input, afr: L/l, af: [1, 2, 4, 7] }, + 1 => { reset: Input, afr: L/l, af: [1, 4, 7] }, + 2 => { reset: Input, afr: L/l, af: [0, 1, 2, 3] }, + 3 => { reset: Input, afr: L/l, af: [0, 1, 2, 3] }, + 4 => { reset: Input, afr: L/l, af: [0, 1, 2, 3] }, + 5 => { reset: Input, afr: L/l, af: [0, 1, 2, 3] }, + 6 => { reset: Input, afr: L/l, af: [0, 1] }, + 7 => { reset: Input, afr: L/l, af: [1, 2] }, + 8 => { reset: Input, afr: H/h, af: [1, 2] }, + 9 => { reset: Input, afr: H/h, af: [1, 2] }, + 10 => { reset: Input, afr: H/h, af: [1, 2] }, + 11 => { reset: Input, afr: H/h, af: [1, 2] }, + 12 => { reset: Input, afr: H/h, af: [1, 2] }, + 13 => { reset: Input, afr: H/h, af: [1, 2] }, + 14 => { reset: Input, afr: H/h, af: [1, 2, 6] }, + 15 => { reset: Input, afr: H/h, af: [1, 2, 7] }, ], }, { - devices: [ - "stm32f334", + port: (F/f, pac: gpioc), + pins: [ + 0 => { reset: Input, afr: L/l, af: [4, 6] }, + 1 => { reset: Input, afr: L/l, af: [4] }, + 2 => { reset: Input, afr: L/l, af: [1] }, + 4 => { reset: Input, afr: L/l, af: [1, 2] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 4, 7] }, + 9 => { reset: Input, afr: H/h, af: [1, 3, 5] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 5] }, ], - devices_except: [], - GPIO: GPIOF, - gpio: gpiof, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopfen, - gpio_mapped_iorst: iopfrst, - partially_erased_pin: PFx, + }, +]); + +#[cfg(feature = "gpio-f333")] +gpio!([ + { + port: (A/a, pac: gpioa), pins: [ - PF0: (pf0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF6: (into_af6, af6,), - ], []), - PF1: (pf1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [], []), - PF2: (pf2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [], []), - PF4: (pf4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [], []), - PF5: (pf5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], []), - PF6: (pf6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [], []), - PF9: (pf9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], []), - PF10: (pf10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [], []), + 0 => { reset: Input, afr: L/l, af: [1, 3, 7, 15] }, + 1 => { reset: Input, afr: L/l, af: [1, 3, 7, 9, 15] }, + 2 => { reset: Input, afr: L/l, af: [1, 3, 7, 8, 9, 15] }, + 3 => { reset: Input, afr: L/l, af: [1, 3, 7, 9, 15] }, + 4 => { reset: Input, afr: L/l, af: [2, 3, 5, 7, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 3, 5, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 5, 6, 13, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3, 5, 6, 15] }, + 8 => { reset: Input, afr: H/h, af: [0, 6, 7, 13, 15] }, + 9 => { reset: Input, afr: H/h, af: [3, 6, 7, 9, 10, 13, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 6, 7, 8, 10, 13, 15] }, + 11 => { reset: Input, afr: H/h, af: [6, 7, 9, 11, 12, 13, 15] }, + 12 => { reset: Input, afr: H/h, af: [1, 6, 7, 8, 9, 11, 13, 15] }, + 13 => { reset: AF0, afr: H/h, af: [0, 1, 3, 5, 7, 15] }, + 14 => { reset: AF0, afr: H/h, af: [0, 3, 4, 6, 7, 15] }, + 15 => { reset: AF0, afr: H/h, af: [0, 1, 3, 4, 5, 7, 9, 13, 15] }, ], }, { - devices: [ - "stm32f303xb", - "stm32f303xc", - "stm32f303xd", - "stm32f303xe", + port: (B/b, pac: gpiob), + pins: [ + 0 => { reset: Input, afr: L/l, af: [2, 3, 6, 15] }, + 1 => { reset: Input, afr: L/l, af: [2, 3, 6, 8, 13, 15] }, + 2 => { reset: Input, afr: L/l, af: [3, 13, 15] }, + 3 => { reset: AF0, afr: L/l, af: [0, 1, 3, 5, 7, 10, 12, 13, 15] }, + 4 => { reset: AF0, afr: L/l, af: [0, 1, 2, 3, 5, 7, 10, 13, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 4, 5, 7, 10, 13, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 3, 4, 7, 12, 13, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 3, 4, 7, 10, 13, 15] }, + 8 => { reset: Input, afr: H/h, af: [1, 3, 4, 7, 9, 12, 13, 15] }, + 9 => { reset: Input, afr: H/h, af: [1, 4, 6, 7, 8, 9, 13, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 7, 13, 15] }, + 11 => { reset: Input, afr: H/h, af: [1, 3, 7, 13, 15] }, + 12 => { reset: Input, afr: H/h, af: [3, 6, 7, 13, 15] }, + 13 => { reset: Input, afr: H/h, af: [3, 6, 7, 13, 15] }, + 14 => { reset: Input, afr: H/h, af: [1, 3, 6, 7, 13, 15] }, + 15 => { reset: Input, afr: H/h, af: [1, 2, 4, 13, 15] }, ], - devices_except: [], - GPIO: GPIOF, - gpio: gpiof, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopfen, - gpio_mapped_iorst: iopfrst, - partially_erased_pin: PFx, + }, + { + port: (C/c, pac: gpioc), pins: [ - PF0: (pf0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF4: (into_af4, af4,), - AF6: (into_af6, af6,), - ], [ - AF1: (into_af1, af1, ["stm32f303xd", "stm32f303xe",],), - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - ]), - PF1: (pf1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF4: (into_af4, af4,), - ], [ - AF1: (into_af1, af1, ["stm32f303xd", "stm32f303xe",],), - AF5: (into_af5, af5, ["stm32f303xd", "stm32f303xe",],), - ]), - PF2: (pf2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - ], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PF3: (pf3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [], []), - PF4: (pf4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - ], [ - AF3: (into_af3, af3, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PF5: (pf5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], []), - PF6: (pf6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - ], [ - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PF7: (pf7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [], []), - PF8: (pf8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [], []), - PF9: (pf9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PF10: (pf10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF3: (into_af3, af3,), - AF5: (into_af5, af5,), - ], [ - AF2: (into_af2, af2, ["stm32f303xd", "stm32f303xe",],), - AF12: (into_af12, af12, ["stm32f303xd", "stm32f303xe",],), - ]), - PF11: (pf11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [], []), - PF12: (pf12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [], []), - PF13: (pf13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [], []), - PF14: (pf14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [], []), - PF15: (pf15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [], []), + 0 => { reset: Input, afr: L/l, af: [1, 2] }, + 1 => { reset: Input, afr: L/l, af: [1, 2] }, + 2 => { reset: Input, afr: L/l, af: [1, 2] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 6] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 3, 7] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 7] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 3] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 3] }, + 10 => { reset: Input, afr: H/h, af: [1, 7] }, + 11 => { reset: Input, afr: H/h, af: [1, 3, 7] }, + 12 => { reset: Input, afr: H/h, af: [1, 3, 7] }, + 13 => { reset: Input, afr: H/h, af: [4] }, + 14 => { reset: Input, afr: H/h, af: [] }, + 15 => { reset: Input, afr: H/h, af: [] }, ], }, { - devices: [ - "stm32f373", - "stm32f378", + port: (D/d, pac: gpioc), + pins: [ + 2 => { reset: Input, afr: L/l, af: [1, 2] }, ], - devices_except: [], - GPIO: GPIOF, - gpio: gpiof, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopfen, - gpio_mapped_iorst: iopfrst, - partially_erased_pin: PFx, + }, + { + port: (F/f, pac: gpioc), pins: [ - PF0: (pf0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF4: (into_af4, af4,), - ], []), - PF1: (pf1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF4: (into_af4, af4,), - ], []), - PF2: (pf2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - AF4: (into_af4, af4,), - ], []), - PF4: (pf4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF1: (into_af1, af1,), - ], []), - PF6: (pf6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF4: (into_af4, af4,), - AF5: (into_af5, af5,), - AF7: (into_af7, af7,), - ], []), - PF7: (pf7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [ - AF1: (into_af1, af1,), - AF4: (into_af4, af4,), - AF7: (into_af7, af7,), - ], []), - PF9: (pf9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], []), - PF10: (pf10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - ], []), + 0 => { reset: Input, afr: L/l, af: [6] }, + 1 => { reset: Input, afr: L/l, af: [] }, ], }, +]); + +#[cfg(feature = "gpio-f373")] +gpio!([ { - devices: [ - "stm32f328", - "stm32f358", - "stm32f398", + port: (A/a, pac: gpioa), + pins: [ + 0 => { reset: Input, afr: L/l, af: [1, 2, 3, 7, 8, 11, 15] }, + 1 => { reset: Input, afr: L/l, af: [0, 1, 2, 3, 6, 7, 9, 11, 15] }, + 2 => { reset: Input, afr: L/l, af: [1, 2, 3, 6, 7, 8, 9, 11, 15] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 3, 6, 7, 9, 11, 15] }, + 4 => { reset: Input, afr: L/l, af: [2, 3, 5, 6, 7, 10, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 3, 5, 7, 9, 10, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 5, 8, 9, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3, 5, 8, 9, 15] }, + 8 => { reset: Input, afr: H/h, af: [0, 2, 4, 5, 7, 10, 15] }, + 9 => { reset: Input, afr: H/h, af: [2, 3, 4, 5, 7, 9, 10, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 4, 5, 7, 9, 10, 15] }, + 11 => { reset: Input, afr: H/h, af: [2, 5, 6, 7, 8, 9, 10, 14, 15] }, + 12 => { reset: Input, afr: H/h, af: [1, 2, 6, 7, 8, 9, 10, 14, 15] }, + 13 => { reset: AF0, afr: H/h, af: [0, 1, 2, 3, 5, 6, 7, 10, 15] }, + 14 => { reset: AF0, afr: H/h, af: [0, 3, 4, 10, 15] }, + 15 => { reset: AF0, afr: H/h, af: [0, 1, 3, 4, 5, 6, 10, 15] }, ], - devices_except: [], - GPIO: GPIOF, - gpio: gpiof, - gpio_mapped: gpioc, - gpio_mapped_ioenr: iopfen, - gpio_mapped_iorst: iopfrst, - partially_erased_pin: PFx, + }, + { + port: (B/b, pac: gpiob), pins: [ - PF0: (pf0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF6: (into_af6, af6, ["stm32f328", "stm32f358", "stm32f398",],), - ]), - PF1: (pf1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - ]), - PF2: (pf2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF3: (pf3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF4: (pf4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF3: (into_af3, af3, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF5: (pf5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF6: (pf6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f358", "stm32f398",],), - AF4: (into_af4, af4, ["stm32f358", "stm32f398",],), - AF7: (into_af7, af7, ["stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF7: (pf7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF8: (pf8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF9: (pf9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF3: (into_af3, af3, ["stm32f398",],), - AF5: (into_af5, af5, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF10: (pf10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [], [ - AF1: (into_af1, af1, ["stm32f358", "stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF3: (into_af3, af3, ["stm32f358", "stm32f398",],), - AF5: (into_af5, af5, ["stm32f358", "stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF11: (pf11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - ]), - PF12: (pf12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF13: (pf13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF14: (pf14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), - PF15: (pf15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [], [ - AF1: (into_af1, af1, ["stm32f398",],), - AF2: (into_af2, af2, ["stm32f398",],), - AF12: (into_af12, af12, ["stm32f398",],), - ]), + 0 => { reset: Input, afr: L/l, af: [2, 3, 5, 10, 15] }, + 1 => { reset: Input, afr: L/l, af: [2, 3, 15] }, + 2 => { reset: Input, afr: L/l, af: [15] }, + 3 => { reset: AF0, afr: L/l, af: [0, 1, 2, 3, 5, 6, 7, 9, 10, 15] }, + 4 => { reset: AF0, afr: L/l, af: [0, 1, 2, 3, 5, 6, 7, 9, 10, 15] }, + 5 => { reset: Input, afr: L/l, af: [1, 2, 4, 5, 6, 7, 10, 11, 15] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 7, 9, 10, 11, 15] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 3, 4, 7, 9, 10, 11, 15] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 15] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 4, 5, 6, 7, 8, 9, 11, 15] }, + 10 => { reset: Input, afr: H/h, af: [1, 3, 5, 6, 7, 15] }, + 14 => { reset: Input, afr: H/h, af: [1, 3, 5, 7, 9, 15] }, + 15 => { reset: Input, afr: H/h, af: [0, 1, 2, 3, 5, 9, 15] }, ], }, { - devices: [ - "stm32f303xd", - "stm32f303xe", + port: (C/c, pac: gpioc), + pins: [ + 0 => { reset: Input, afr: L/l, af: [1, 2] }, + 1 => { reset: Input, afr: L/l, af: [1, 2] }, + 2 => { reset: Input, afr: L/l, af: [1, 2, 5] }, + 3 => { reset: Input, afr: L/l, af: [1, 2, 5] }, + 4 => { reset: Input, afr: L/l, af: [1, 2, 3, 7] }, + 5 => { reset: Input, afr: L/l, af: [1, 3, 7] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 5] }, + 7 => { reset: Input, afr: L/l, af: [1, 2, 5] }, + 8 => { reset: Input, afr: H/h, af: [1, 2, 5] }, + 9 => { reset: Input, afr: H/h, af: [1, 2, 5] }, + 10 => { reset: Input, afr: H/h, af: [1, 2, 6, 7] }, + 11 => { reset: Input, afr: H/h, af: [1, 2, 6, 7] }, + 12 => { reset: Input, afr: H/h, af: [1, 2, 6, 7] }, + 13 => { reset: Input, afr: H/h, af: [] }, + 14 => { reset: Input, afr: H/h, af: [] }, + 15 => { reset: Input, afr: H/h, af: [] }, ], - devices_except: [], - GPIO: GPIOG, - gpio: gpiog, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iopgen, - gpio_mapped_iorst: iopgrst, - partially_erased_pin: PGx, + }, + { + port: (D/d, pac: gpiod), pins: [ - PG0: (pg0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PG1: (pg1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PG2: (pg2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PG3: (pg3, 3, Input, moder3, AFRL, afrl3, bs3, br3, odr3, idr3, pupdr3, ot3, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PG4: (pg4, 4, Input, moder4, AFRL, afrl4, bs4, br4, odr4, idr4, pupdr4, ot4, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PG5: (pg5, 5, Input, moder5, AFRL, afrl5, bs5, br5, odr5, idr5, pupdr5, ot5, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PG6: (pg6, 6, Input, moder6, AFRL, afrl6, bs6, br6, odr6, idr6, pupdr6, ot6, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG7: (pg7, 7, Input, moder7, AFRL, afrl7, bs7, br7, odr7, idr7, pupdr7, ot7, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG8: (pg8, 8, Input, moder8, AFRH, afrh8, bs8, br8, odr8, idr8, pupdr8, ot8, [ - AF1: (into_af1, af1,), - ], []), - PG9: (pg9, 9, Input, moder9, AFRH, afrh9, bs9, br9, odr9, idr9, pupdr9, ot9, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG10: (pg10, 10, Input, moder10, AFRH, afrh10, bs10, br10, odr10, idr10, pupdr10, ot10, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG11: (pg11, 11, Input, moder11, AFRH, afrh11, bs11, br11, odr11, idr11, pupdr11, ot11, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG12: (pg12, 12, Input, moder12, AFRH, afrh12, bs12, br12, odr12, idr12, pupdr12, ot12, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG13: (pg13, 13, Input, moder13, AFRH, afrh13, bs13, br13, odr13, idr13, pupdr13, ot13, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG14: (pg14, 14, Input, moder14, AFRH, afrh14, bs14, br14, odr14, idr14, pupdr14, ot14, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), - PG15: (pg15, 15, Input, moder15, AFRH, afrh15, bs15, br15, odr15, idr15, pupdr15, ot15, [ - AF1: (into_af1, af1,), - ], []), + 0 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 1 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 2 => { reset: Input, afr: L/l, af: [1, 2] }, + 3 => { reset: Input, afr: L/l, af: [1, 5, 7] }, + 4 => { reset: Input, afr: L/l, af: [1, 5, 7] }, + 5 => { reset: Input, afr: L/l, af: [1, 7] }, + 6 => { reset: Input, afr: L/l, af: [1, 5, 7] }, + 7 => { reset: Input, afr: L/l, af: [1, 5, 7] }, + 8 => { reset: Input, afr: H/h, af: [1, 3, 5, 7] }, + 9 => { reset: Input, afr: H/h, af: [1, 3, 7] }, + 10 => { reset: Input, afr: H/h, af: [1, 7] }, + 11 => { reset: Input, afr: H/h, af: [1, 7] }, + 12 => { reset: Input, afr: H/h, af: [1, 2, 3, 7] }, + 13 => { reset: Input, afr: H/h, af: [1, 2, 3] }, + 14 => { reset: Input, afr: H/h, af: [1, 2, 3] }, + 15 => { reset: Input, afr: H/h, af: [1, 2, 3] }, ], }, { - devices: [ - "stm32f303xd", - "stm32f303xe", + port: (E/e, pac: gpioc), + pins: [ + 0 => { reset: Input, afr: L/l, af: [1, 2, 7] }, + 1 => { reset: Input, afr: L/l, af: [1, 7] }, + 2 => { reset: Input, afr: L/l, af: [0, 1, 3] }, + 3 => { reset: Input, afr: L/l, af: [0, 1, 3] }, + 4 => { reset: Input, afr: L/l, af: [0, 1, 3] }, + 5 => { reset: Input, afr: L/l, af: [0, 1, 3] }, + 6 => { reset: Input, afr: L/l, af: [0, 1] }, + 7 => { reset: Input, afr: L/l, af: [1] }, + 8 => { reset: Input, afr: H/h, af: [1] }, + 9 => { reset: Input, afr: H/h, af: [1] }, + 10 => { reset: Input, afr: H/h, af: [1] }, + 11 => { reset: Input, afr: H/h, af: [1] }, + 12 => { reset: Input, afr: H/h, af: [1] }, + 13 => { reset: Input, afr: H/h, af: [1] }, + 14 => { reset: Input, afr: H/h, af: [1] }, + 15 => { reset: Input, afr: H/h, af: [1, 7] }, ], - devices_except: [], - GPIO: GPIOH, - gpio: gpioh, - gpio_mapped: gpiob, - gpio_mapped_ioenr: iophen, - gpio_mapped_iorst: iophrst, - partially_erased_pin: PHx, + }, + { + port: (F/f, pac: gpioc), pins: [ - PH0: (ph0, 0, Input, moder0, AFRL, afrl0, bs0, br0, odr0, idr0, pupdr0, ot0, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PH1: (ph1, 1, Input, moder1, AFRL, afrl1, bs1, br1, odr1, idr1, pupdr1, ot1, [ - AF1: (into_af1, af1,), - AF2: (into_af2, af2,), - AF12: (into_af12, af12,), - ], []), - PH2: (ph2, 2, Input, moder2, AFRL, afrl2, bs2, br2, odr2, idr2, pupdr2, ot2, [ - AF1: (into_af1, af1,), - AF12: (into_af12, af12,), - ], []), + 0 => { reset: Input, afr: L/l, af: [4] }, + 1 => { reset: Input, afr: L/l, af: [4] }, + 2 => { reset: Input, afr: L/l, af: [1, 4] }, + 4 => { reset: Input, afr: L/l, af: [1] }, + 6 => { reset: Input, afr: L/l, af: [1, 2, 4, 5, 7] }, + 7 => { reset: Input, afr: L/l, af: [1, 4, 7] }, + 9 => { reset: Input, afr: H/h, af: [1, 2] }, + 10 => { reset: Input, afr: H/h, af: [1] }, ], }, ]); diff --git a/src/i2c.rs b/src/i2c.rs index 98a4e6eb6..96dfafb66 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -1,30 +1,14 @@ //! Inter-Integrated Circuit (I2C) bus -use crate::pac::{I2C1, I2C2}; +use crate::{ + gpio::{gpioa, gpiob, gpiof, AF4}, + hal::blocking::i2c::{Read, Write, WriteRead}, + pac::{I2C1, I2C2}, + rcc::{Clocks, APB1}, + time::Hertz, +}; use cast::u8; -use crate::gpio::gpioa::{PA10, PA9}; -use crate::gpio::gpiob::{PB6, PB7, PB8, PB9}; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f334", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398", - feature = "stm32f373", - feature = "stm32f378" -))] -use crate::gpio::gpiof::PF6; -use crate::gpio::gpiof::{PF0, PF1}; -use crate::gpio::AF4; -use crate::hal::blocking::i2c::{Read, Write, WriteRead}; -use crate::rcc::{Clocks, APB1}; -use crate::time::Hertz; - /// I2C error #[derive(Debug)] #[non_exhaustive] @@ -47,32 +31,21 @@ pub unsafe trait SclPin {} pub unsafe trait SdaPin {} // unsafe impl SclPin for PA15 {} -unsafe impl SclPin for PB6 {} -unsafe impl SclPin for PB8 {} +unsafe impl SclPin for gpiob::PB6 {} +unsafe impl SclPin for gpiob::PB8 {} -unsafe impl SclPin for PA9 {} -unsafe impl SclPin for PF1 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f334", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398", - feature = "stm32f373", - feature = "stm32f378" -))] -unsafe impl SclPin for PF6 {} +unsafe impl SclPin for gpioa::PA9 {} +unsafe impl SclPin for gpiof::PF1 {} + +#[cfg(any(feature = "gpio-f303", feature = "gpio-f303e", feature = "gpio-f373"))] +unsafe impl SclPin for gpiof::PF6 {} // unsafe impl SdaPin for PA14 {} -unsafe impl SdaPin for PB7 {} -unsafe impl SdaPin for PB9 {} +unsafe impl SdaPin for gpiob::PB7 {} +unsafe impl SdaPin for gpiob::PB9 {} -unsafe impl SdaPin for PA10 {} -unsafe impl SdaPin for PF0 {} +unsafe impl SdaPin for gpioa::PA10 {} +unsafe impl SdaPin for gpiof::PF0 {} /// I2C peripheral operating in master mode pub struct I2c { diff --git a/src/pwm.rs b/src/pwm.rs index 88dfab16b..b8c24e9f8 100644 --- a/src/pwm.rs +++ b/src/pwm.rs @@ -151,159 +151,20 @@ we have no pins in use, but it cannot be used once we've used PA7. */ -use crate::pac::{TIM15, TIM16, TIM17, TIM2}; +use crate::{ + gpio::{self, gpioa, gpiob}, + hal::PwmPin, + pac::{RCC, TIM15, TIM16, TIM17, TIM2}, + rcc::Clocks, + time::Hertz, +}; use core::marker::PhantomData; -use embedded_hal::PwmPin; #[cfg(any( - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f373", - feature = "stm32f303", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::AF11; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::AF3; -#[cfg(any(feature = "stm32f303", feature = "stm32f358", feature = "stm32f398"))] -use crate::gpio::AF5; -use crate::gpio::{AF1, AF10, AF2, AF9}; -#[cfg(any( - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::{AF4, AF6}; - -#[cfg(any( - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioa::PA11; -#[cfg(any( - feature = "stm32f303", - feature = "stm32f373", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioa::PA14; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioa::PA4; -#[cfg(any( - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f373", - feature = "stm32f303", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioa::PA8; -use crate::gpio::gpioa::{PA0, PA1, PA10, PA12, PA13, PA15, PA2, PA3, PA5, PA6, PA7, PA9}; - -#[cfg(any( - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiob::PB13; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiob::PB7; -#[cfg(any( - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiob::{PB0, PB1}; -use crate::gpio::gpiob::{PB10, PB11, PB14, PB15, PB3, PB4, PB5, PB6, PB8, PB9}; - -#[cfg(any( - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioc::PC13; -#[cfg(feature = "stm32f373")] -use crate::gpio::gpioc::PC4; -#[cfg(any(feature = "stm32f334", feature = "stm32f373", feature = "stm32f398"))] -use crate::gpio::gpioc::{PC0, PC1, PC2, PC3}; -#[cfg(any( - feature = "stm32f303", - feature = "stm32f373", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioc::{PC10, PC11, PC12}; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioc::{PC6, PC7, PC8, PC9}; - -#[cfg(feature = "stm32f373")] -use crate::gpio::gpiod::PD0; -#[cfg(any( - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiod::PD1; -#[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -311,79 +172,33 @@ use crate::gpio::gpiod::PD1; feature = "stm32f373", feature = "stm32f378", feature = "stm32f358", - feature = "stm32f398" + feature = "stm32f398", ))] -use crate::gpio::gpiod::{PD12, PD13, PD14, PD15}; +use crate::gpio::gpiod; #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", feature = "stm32f303xe", feature = "stm32f358", - feature = "stm32f398" + feature = "stm32f398", ))] -use crate::gpio::gpiod::{PD3, PD4, PD6, PD7}; - -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioe::{PE0, PE1, PE10, PE11, PE12, PE13, PE14, PE6, PE7, PE8, PE9}; -#[cfg(feature = "stm32f398")] -use crate::gpio::gpioe::{PE2, PE4}; - +use crate::gpio::gpioe; #[cfg(any( feature = "stm32f318", feature = "stm32f302", feature = "stm32f303", - feature = "stm32f334", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiof::PF0; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiof::PF10; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", feature = "stm32f373", feature = "stm32f378", + feature = "stm32f334", feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiof::PF6; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f358", - feature = "stm32f398" + feature = "stm32f398", ))] -use crate::gpio::gpiof::PF9; - -use crate::pac::RCC; -use crate::rcc::Clocks; -use crate::time::Hertz; +use crate::gpio::{gpioc, gpiof}; /// Output Compare Channel 1 of Timer 1 (type state) pub struct TIM2_CH1 {} @@ -522,14 +337,14 @@ macro_rules! pwm_timer_with_break { } macro_rules! pwm_channel_pin { - ($resulting_state:ident, $TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident, $ccmrz_output:ident, $ocym:ident, $ocype:ident) => { + ($resulting_state:ident, $TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty, $ccmrz_output:ident, $ocym:ident, $ocype:ident) => { impl PwmChannel<$TIMx_CHy, NoPins> { /// Output to a specific pin from a channel that does not yet have /// any pins. This channel cannot be enabled until this method /// is called. /// /// The pin is consumed and cannot be returned. - pub fn $output_to_pzx(self, _p: $Pzi<$AFj>) -> PwmChannel<$TIMx_CHy, $resulting_state> { + pub fn $output_to_pzx(self, _p: $Pin) -> PwmChannel<$TIMx_CHy, $resulting_state> { unsafe { (*$TIMx::ptr()).$ccmrz_output().modify(|_, w| { w @@ -555,7 +370,7 @@ macro_rules! pwm_channel_pin { /// can be used (as long as they are compatible). /// /// The pin is consumed and cannot be returned. - pub fn $output_to_pzx(self, _p: $Pzi<$AFj>) -> PwmChannel<$TIMx_CHy, $resulting_state> { + pub fn $output_to_pzx(self, _p: $Pin) -> PwmChannel<$TIMx_CHy, $resulting_state> { self } } @@ -563,14 +378,13 @@ macro_rules! pwm_channel_pin { } macro_rules! pwm_channel1_pin { - ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident) => { + ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty) => { pwm_channel_pin!( WithPins, $TIMx, $TIMx_CHy, $output_to_pzx, - $Pzi, - $AFj, + $Pin, ccmr1_output, oc1m, oc1pe @@ -579,14 +393,13 @@ macro_rules! pwm_channel1_pin { } macro_rules! pwm_channel1n_pin { - ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident) => { + ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty) => { pwm_channel_pin!( WithNPins, $TIMx, $TIMx_CHy, $output_to_pzx, - $Pzi, - $AFj, + $Pin, ccmr1_output, oc1m, oc1pe @@ -595,14 +408,13 @@ macro_rules! pwm_channel1n_pin { } macro_rules! pwm_channel2_pin { - ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident) => { + ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty) => { pwm_channel_pin!( WithPins, $TIMx, $TIMx_CHy, $output_to_pzx, - $Pzi, - $AFj, + $Pin, ccmr1_output, oc2m, oc2pe @@ -619,14 +431,13 @@ macro_rules! pwm_channel2_pin { feature = "stm32f398" ))] macro_rules! pwm_channel2n_pin { - ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident) => { + ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty) => { pwm_channel_pin!( WithNPins, $TIMx, $TIMx_CHy, $output_to_pzx, - $Pzi, - $AFj, + $Pin, ccmr1_output, oc2m, oc2pe @@ -635,14 +446,13 @@ macro_rules! pwm_channel2n_pin { } macro_rules! pwm_channel3_pin { - ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident) => { + ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty) => { pwm_channel_pin!( WithPins, $TIMx, $TIMx_CHy, $output_to_pzx, - $Pzi, - $AFj, + $Pin, ccmr2_output, oc3m, oc3pe @@ -659,14 +469,13 @@ macro_rules! pwm_channel3_pin { feature = "stm32f398" ))] macro_rules! pwm_channel3n_pin { - ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident) => { + ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty) => { pwm_channel_pin!( WithNPins, $TIMx, $TIMx_CHy, $output_to_pzx, - $Pzi, - $AFj, + $Pin, ccmr2_output, oc3m, oc3pe @@ -675,14 +484,13 @@ macro_rules! pwm_channel3n_pin { } macro_rules! pwm_channel4_pin { - ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pzi:ident, $AFj:ident) => { + ($TIMx:ident, $TIMx_CHy:ident, $output_to_pzx:ident, $Pin:ty) => { pwm_channel_pin!( WithPins, $TIMx, $TIMx_CHy, $output_to_pzx, - $Pzi, - $AFj, + $Pin, ccmr2_output, oc4m, oc4pe @@ -785,44 +593,47 @@ macro_rules! tim1_common { pwm_pin_for_pwm_channel!(TIM1, TIM1_CH4, u16, cc4e, ccr4, ccr); //Pins - pwm_channel1_pin!(TIM1, TIM1_CH1, output_to_pa8, PA8, AF6); + pwm_channel1_pin!(TIM1, TIM1_CH1, output_to_pa8, gpioa::PA8); - pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pa7, PA7, AF6); - pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pa11, PA11, AF6); - pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pb13, PB13, AF6); - pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pc13, PC13, AF4); + pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pa7, gpioa::PA7); + pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pa11, gpioa::PA11); + pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pb13, gpiob::PB13); + pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pc13, gpioc::PC13); - pwm_channel2_pin!(TIM1, TIM1_CH2, output_to_pa9, PA9, AF6); + pwm_channel2_pin!(TIM1, TIM1_CH2, output_to_pa9, gpioa::PA9); - pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pa12, PA12, AF6); - pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pb0, PB0, AF6); - pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pb14, PB14, AF6); + pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pa12, gpioa::PA12); + pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pb0, gpiob::PB0); + pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pb14, gpiob::PB14); - pwm_channel3_pin!(TIM1, TIM1_CH3, output_to_pa10, PA10, AF6); + pwm_channel3_pin!(TIM1, TIM1_CH3, output_to_pa10, gpioa::PA10); - pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pb1, PB1, AF6); - pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pb15, PB15, AF4); - pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pf0, PF0, AF6); + pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pb1, gpiob::PB1); + pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pb15, gpiob::PB15); + pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pf0, gpiof::PF0); - pwm_channel4_pin!(TIM1, TIM1_CH4, output_to_pa11, PA11, AF11); + pwm_channel4_pin!(TIM1, TIM1_CH4, output_to_pa11, gpioa::PA11); }; } #[cfg(any(feature = "stm32f334", feature = "stm32f398"))] macro_rules! tim1_ext1 { () => { - pwm_channel1_pin!(TIM1, TIM1_CH1, output_to_pc0, PC0, AF2); + pwm_channel1_pin!(TIM1, TIM1_CH1, output_to_pc0, gpioc::PC0); - pwm_channel2_pin!(TIM1, TIM1_CH2, output_to_pc1, PC1, AF2); + pwm_channel2_pin!(TIM1, TIM1_CH2, output_to_pc1, gpioc::PC1); - pwm_channel3_pin!(TIM1, TIM1_CH3, output_to_pc2, PC2, AF2); + pwm_channel3_pin!(TIM1, TIM1_CH3, output_to_pc2, gpioc::PC2); - pwm_channel4_pin!(TIM1, TIM1_CH4, output_to_pc3, PC3, AF2); + pwm_channel4_pin!(TIM1, TIM1_CH4, output_to_pc3, gpioc::PC3); }; } #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -832,19 +643,19 @@ macro_rules! tim1_ext1 { ))] macro_rules! tim1_ext2 { () => { - pwm_channel1_pin!(TIM1, TIM1_CH1, output_to_pe9, PE9, AF2); + pwm_channel1_pin!(TIM1, TIM1_CH1, output_to_pe9, gpioe::PE9); - pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pe8, PE8, AF2); + pwm_channel1n_pin!(TIM1, TIM1_CH1, output_to_pe8, gpioe::PE8); - pwm_channel2_pin!(TIM1, TIM1_CH2, output_to_pe11, PE11, AF2); + pwm_channel2_pin!(TIM1, TIM1_CH2, output_to_pe11, gpioe::PE11); - pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pe10, PE10, AF2); + pwm_channel2n_pin!(TIM1, TIM1_CH2, output_to_pe10, gpioe::PE10); - pwm_channel3_pin!(TIM1, TIM1_CH3, output_to_pe13, PE13, AF2); + pwm_channel3_pin!(TIM1, TIM1_CH3, output_to_pe13, gpioe::PE13); - pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pe12, PE12, AF2); + pwm_channel3n_pin!(TIM1, TIM1_CH3, output_to_pe12, gpioe::PE12); - pwm_channel4_pin!(TIM1, TIM1_CH4, output_to_pe14, PE14, AF2); + pwm_channel4_pin!(TIM1, TIM1_CH4, output_to_pe14, gpioe::PE14); }; } @@ -863,7 +674,10 @@ tim1_common!(); tim1_ext1!(); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -895,11 +709,14 @@ pwm_pin_for_pwm_channel!(TIM2, TIM2_CH3, u32, cc3e, ccr3, ccr); pwm_pin_for_pwm_channel!(TIM2, TIM2_CH4, u32, cc4e, ccr4, ccr); // Pins -pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pa0, PA0, AF1); -pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pa5, PA5, AF1); -pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pa15, PA15, AF1); +pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pa0, gpioa::PA0); +pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pa5, gpioa::PA5); +pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pa15, gpioa::PA15); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -907,12 +724,15 @@ pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pa15, PA15, AF1); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pd3, PD3, AF2); +pwm_channel1_pin!(TIM2, TIM2_CH1, output_to_pd3, gpiod::PD3); -pwm_channel2_pin!(TIM2, TIM2_CH2, output_to_pa1, PA1, AF1); -pwm_channel2_pin!(TIM2, TIM2_CH2, output_to_pb3, PB3, AF1); +pwm_channel2_pin!(TIM2, TIM2_CH2, output_to_pa1, gpioa::PA1); +pwm_channel2_pin!(TIM2, TIM2_CH2, output_to_pb3, gpiob::PB3); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -920,13 +740,16 @@ pwm_channel2_pin!(TIM2, TIM2_CH2, output_to_pb3, PB3, AF1); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel2_pin!(TIM2, TIM2_CH2, output_to_pd4, PD4, AF2); +pwm_channel2_pin!(TIM2, TIM2_CH2, output_to_pd4, gpiod::PD4); -pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pa2, PA2, AF1); -pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pa9, PA9, AF10); -pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pb10, PB10, AF1); +pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pa2, gpioa::PA2); +pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pa9, gpioa::PA9); +pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pb10, gpiob::PB10); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -934,13 +757,17 @@ pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pb10, PB10, AF1); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pd7, PD7, AF2); +pwm_channel3_pin!(TIM2, TIM2_CH3, output_to_pd7, gpiod::PD7); -pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pa3, PA3, AF1); -pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pa10, PA10, AF1); -pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pb11, PB11, AF1); +pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pa3, gpioa::PA3); +pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pa10, gpioa::PA10); +#[cfg(not(any(feature = "stm32f373", feature = "stm32f378")))] +pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pb11, gpiob::PB11); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -948,7 +775,7 @@ pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pb11, PB11, AF1); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pd6, PD6, AF2); +pwm_channel4_pin!(TIM2, TIM2_CH4, output_to_pd6, gpiod::PD6); // TIM3 @@ -995,17 +822,17 @@ macro_rules! tim3_common { pwm_pin_for_pwm_channel!(TIM3, TIM3_CH4, u16, cc4e, ccr4, ccr); // Pins - pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pa6, PA6, AF2); - pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pb4, PB4, AF2); + pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pa6, gpioa::PA6); + pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pb4, gpiob::PB4); - pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pa4, PA4, AF2); - pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pa7, PA7, AF2); - pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pb5, PB5, AF2); + pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pa4, gpioa::PA4); + pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pa7, gpioa::PA7); + pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pb5, gpiob::PB5); - pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pb0, PB0, AF2); + pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pb0, gpiob::PB0); - pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pb1, PB1, AF2); - pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pb7, PB7, AF10); + pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pb1, gpiob::PB1); + pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pb7, gpiob::PB7); }; } @@ -1020,18 +847,21 @@ macro_rules! tim3_common { ))] macro_rules! tim3_ext1 { () => { - pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pc6, PC6, AF2); + pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pc6, gpioc::PC6); - pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pc7, PC7, AF2); + pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pc7, gpioc::PC7); - pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pc8, PC8, AF2); + pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pc8, gpioc::PC8); - pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pc9, PC9, AF2); + pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pc9, gpioc::PC9); }; } #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1041,13 +871,13 @@ macro_rules! tim3_ext1 { ))] macro_rules! tim3_ext2 { () => { - pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pe2, PE6, AF2); + pwm_channel1_pin!(TIM3, TIM3_CH1, output_to_pe2, gpioe::PE6); - pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pe3, PE7, AF2); + pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pe3, gpioe::PE7); - pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pe4, PE8, AF2); + pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pe4, gpioe::PE8); - pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pe5, PE9, AF2); + pwm_channel4_pin!(TIM3, TIM3_CH4, output_to_pe5, gpioe::PE9); }; } @@ -1075,7 +905,10 @@ tim3_common!(); tim3_ext1!(); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1086,10 +919,10 @@ tim3_ext1!(); tim3_ext2!(); #[cfg(feature = "stm32f373")] -pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pb0, PB0, AF10); +pwm_channel2_pin!(TIM3, TIM3_CH2, output_to_pb0, gpiob::PB0); #[cfg(any(feature = "stm32f373", feature = "stm32f378"))] -pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pb6, PB6, AF10); +pwm_channel3_pin!(TIM3, TIM3_CH3, output_to_pb6, gpiob::PB6); // TIM4 @@ -1134,21 +967,24 @@ macro_rules! tim4_common { pwm_pin_for_pwm_channel!(TIM4, TIM4_CH4, u16, cc4e, ccr4, ccr); // Pins - pwm_channel1_pin!(TIM4, TIM4_CH1, output_to_pa11, PA11, AF10); - pwm_channel1_pin!(TIM4, TIM4_CH1, output_to_pb6, PB6, AF2); + pwm_channel1_pin!(TIM4, TIM4_CH1, output_to_pa11, gpioa::PA11); + pwm_channel1_pin!(TIM4, TIM4_CH1, output_to_pb6, gpiob::PB6); - pwm_channel2_pin!(TIM4, TIM4_CH2, output_to_pa12, PA12, AF10); - pwm_channel2_pin!(TIM4, TIM4_CH2, output_to_pb7, PB7, AF2); + pwm_channel2_pin!(TIM4, TIM4_CH2, output_to_pa12, gpioa::PA12); + pwm_channel2_pin!(TIM4, TIM4_CH2, output_to_pb7, gpiob::PB7); - pwm_channel3_pin!(TIM4, TIM4_CH3, output_to_pa13, PA13, AF10); - pwm_channel3_pin!(TIM4, TIM4_CH3, output_to_pb8, PB8, AF2); + pwm_channel3_pin!(TIM4, TIM4_CH3, output_to_pa13, gpioa::PA13); + pwm_channel3_pin!(TIM4, TIM4_CH3, output_to_pb8, gpiob::PB8); - pwm_channel4_pin!(TIM4, TIM4_CH4, output_to_pb9, PB9, AF2); + pwm_channel4_pin!(TIM4, TIM4_CH4, output_to_pb9, gpiob::PB9); }; } #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1160,14 +996,14 @@ macro_rules! tim4_common { ))] macro_rules! tim4_ext { () => { - pwm_channel1_pin!(TIM4, TIM4_CH1, output_to_pd12, PD12, AF2); + pwm_channel1_pin!(TIM4, TIM4_CH1, output_to_pd12, gpiod::PD12); - pwm_channel2_pin!(TIM4, TIM4_CH2, output_to_pd13, PD13, AF2); + pwm_channel2_pin!(TIM4, TIM4_CH2, output_to_pd13, gpiod::PD13); - pwm_channel3_pin!(TIM4, TIM4_CH3, output_to_pd14, PD14, AF2); + pwm_channel3_pin!(TIM4, TIM4_CH3, output_to_pd14, gpiod::PD14); - pwm_channel4_pin!(TIM4, TIM4_CH4, output_to_pd15, PD15, AF2); - pwm_channel4_pin!(TIM4, TIM4_CH4, output_to_pf6, PF6, AF2); + pwm_channel4_pin!(TIM4, TIM4_CH4, output_to_pd15, gpiod::PD15); + pwm_channel4_pin!(TIM4, TIM4_CH4, output_to_pf6, gpiof::PF6); }; } @@ -1182,7 +1018,10 @@ macro_rules! tim4_ext { tim4_common!(); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1230,21 +1069,21 @@ macro_rules! tim5 { pwm_pin_for_pwm_channel!(TIM5, TIM5_CH4, u32, cc4e, ccr4, ccr); // Pins - pwm_channel1_pin!(TIM5, TIM5_CH1, output_to_pa0, PA0, AF2); - pwm_channel1_pin!(TIM5, TIM5_CH1, output_to_pa8, PA8, AF2); - pwm_channel1_pin!(TIM5, TIM5_CH1, output_to_pc0, PC0, AF2); + pwm_channel1_pin!(TIM5, TIM5_CH1, output_to_pa0, gpioa::PA0); + pwm_channel1_pin!(TIM5, TIM5_CH1, output_to_pa8, gpioa::PA8); + pwm_channel1_pin!(TIM5, TIM5_CH1, output_to_pc0, gpioc::PC0); - pwm_channel2_pin!(TIM5, TIM5_CH2, output_to_pa1, PA1, AF2); - pwm_channel2_pin!(TIM5, TIM5_CH2, output_to_pa11, PA11, AF2); - pwm_channel2_pin!(TIM5, TIM5_CH2, output_to_pc1, PC1, AF2); + pwm_channel2_pin!(TIM5, TIM5_CH2, output_to_pa1, gpioa::PA1); + pwm_channel2_pin!(TIM5, TIM5_CH2, output_to_pa11, gpioa::PA11); + pwm_channel2_pin!(TIM5, TIM5_CH2, output_to_pc1, gpioc::PC1); - pwm_channel3_pin!(TIM5, TIM5_CH3, output_to_pa2, PA2, AF2); - pwm_channel3_pin!(TIM5, TIM5_CH3, output_to_pa12, PA12, AF2); - pwm_channel3_pin!(TIM5, TIM5_CH3, output_to_pc2, PC2, AF2); + pwm_channel3_pin!(TIM5, TIM5_CH3, output_to_pa2, gpioa::PA2); + pwm_channel3_pin!(TIM5, TIM5_CH3, output_to_pa12, gpioa::PA12); + pwm_channel3_pin!(TIM5, TIM5_CH3, output_to_pc2, gpioc::PC2); - pwm_channel4_pin!(TIM5, TIM5_CH4, output_to_pa3, PA3, AF2); - pwm_channel4_pin!(TIM5, TIM5_CH4, output_to_pa13, PA13, AF2); - pwm_channel4_pin!(TIM5, TIM5_CH4, output_to_pc3, PC3, AF2); + pwm_channel4_pin!(TIM5, TIM5_CH4, output_to_pa3, gpioa::PA3); + pwm_channel4_pin!(TIM5, TIM5_CH4, output_to_pa13, gpioa::PA13); + pwm_channel4_pin!(TIM5, TIM5_CH4, output_to_pc3, gpioc::PC3); }; } @@ -1288,30 +1127,30 @@ macro_rules! tim8 { pwm_pin_for_pwm_channel!(TIM8, TIM8_CH4, u16, cc4e, ccr4, ccr); //Pins - pwm_channel1_pin!(TIM8, TIM8_CH1, output_to_pa15, PA15, AF2); - pwm_channel1_pin!(TIM8, TIM8_CH1, output_to_pb6, PB6, AF2); - pwm_channel1_pin!(TIM8, TIM8_CH1, output_to_pc6, PC6, AF4); + pwm_channel1_pin!(TIM8, TIM8_CH1, output_to_pa15, gpioa::PA15); + pwm_channel1_pin!(TIM8, TIM8_CH1, output_to_pb6, gpiob::PB6); + pwm_channel1_pin!(TIM8, TIM8_CH1, output_to_pc6, gpioc::PC6); - pwm_channel1n_pin!(TIM8, TIM8_CH1, output_to_pa7, PA7, AF4); - pwm_channel1n_pin!(TIM8, TIM8_CH1, output_to_pb3, PB3, AF4); - pwm_channel1n_pin!(TIM8, TIM8_CH1, output_to_pc10, PC10, AF4); + pwm_channel1n_pin!(TIM8, TIM8_CH1, output_to_pa7, gpioa::PA7); + pwm_channel1n_pin!(TIM8, TIM8_CH1, output_to_pb3, gpiob::PB3); + pwm_channel1n_pin!(TIM8, TIM8_CH1, output_to_pc10, gpioc::PC10); - pwm_channel2_pin!(TIM8, TIM8_CH2, output_to_pa14, PA14, AF5); - pwm_channel2_pin!(TIM8, TIM8_CH2, output_to_pb8, PB8, AF10); - pwm_channel2_pin!(TIM8, TIM8_CH2, output_to_pc7, PC7, AF4); + pwm_channel2_pin!(TIM8, TIM8_CH2, output_to_pa14, gpioa::PA14); + pwm_channel2_pin!(TIM8, TIM8_CH2, output_to_pb8, gpiob::PB8); + pwm_channel2_pin!(TIM8, TIM8_CH2, output_to_pc7, gpioc::PC7); - pwm_channel2n_pin!(TIM8, TIM8_CH2, output_to_pb0, PB0, AF4); - pwm_channel2n_pin!(TIM8, TIM8_CH2, output_to_pb4, PB4, AF4); - pwm_channel2n_pin!(TIM8, TIM8_CH2, output_to_pc11, PC11, AF4); + pwm_channel2n_pin!(TIM8, TIM8_CH2, output_to_pb0, gpiob::PB0); + pwm_channel2n_pin!(TIM8, TIM8_CH2, output_to_pb4, gpiob::PB4); + pwm_channel2n_pin!(TIM8, TIM8_CH2, output_to_pc11, gpioc::PC11); - pwm_channel3_pin!(TIM8, TIM8_CH3, output_to_pb9, PB9, AF10); - pwm_channel3_pin!(TIM8, TIM8_CH3, output_to_pc8, PC8, AF4); + pwm_channel3_pin!(TIM8, TIM8_CH3, output_to_pb9, gpiob::PB9); + pwm_channel3_pin!(TIM8, TIM8_CH3, output_to_pc8, gpioc::PC8); - pwm_channel3n_pin!(TIM8, TIM8_CH3, output_to_pb1, PB1, AF4); - pwm_channel3n_pin!(TIM8, TIM8_CH3, output_to_pb5, PB5, AF3); - pwm_channel3n_pin!(TIM8, TIM8_CH3, output_to_pc12, PC12, AF4); + pwm_channel3n_pin!(TIM8, TIM8_CH3, output_to_pb1, gpiob::PB1); + pwm_channel3n_pin!(TIM8, TIM8_CH3, output_to_pb5, gpiob::PB5); + pwm_channel3n_pin!(TIM8, TIM8_CH3, output_to_pc12, gpioc::PC12); - pwm_channel4_pin!(TIM8, TIM8_CH4, output_to_pc9, PC9, AF4); + pwm_channel4_pin!(TIM8, TIM8_CH4, output_to_pc9, gpioc::PC9); }; } @@ -1326,7 +1165,7 @@ tim8!(); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel4_pin!(TIM8, TIM8_CH4, output_to_pd1, PD1, AF4); +pwm_channel4_pin!(TIM8, TIM8_CH4, output_to_pd1, gpiod::PD1); // TIM12 @@ -1362,13 +1201,13 @@ macro_rules! tim12 { pwm_pin_for_pwm_channel!(TIM12, TIM12_CH2, u16, cc2e, ccr2, ccr); // Pins - pwm_channel1_pin!(TIM12, TIM12_CH1, output_to_pa4, PA4, AF10); - pwm_channel1_pin!(TIM12, TIM12_CH1, output_to_pa14, PA14, AF10); - pwm_channel1_pin!(TIM12, TIM12_CH1, output_to_pb14, PB14, AF10); + pwm_channel1_pin!(TIM12, TIM12_CH1, output_to_pa4, gpioa::PA4); + pwm_channel1_pin!(TIM12, TIM12_CH1, output_to_pa14, gpioa::PA14); + pwm_channel1_pin!(TIM12, TIM12_CH1, output_to_pb14, gpiob::PB14); - pwm_channel2_pin!(TIM12, TIM12_CH2, output_to_pa5, PA5, AF10); - pwm_channel2_pin!(TIM12, TIM12_CH2, output_to_pa15, PA15, AF10); - pwm_channel2_pin!(TIM12, TIM12_CH2, output_to_pb15, PB15, AF10); + pwm_channel2_pin!(TIM12, TIM12_CH2, output_to_pa5, gpioa::PA5); + pwm_channel2_pin!(TIM12, TIM12_CH2, output_to_pa15, gpioa::PA15); + pwm_channel2_pin!(TIM12, TIM12_CH2, output_to_pb15, gpiob::PB15); }; } @@ -1409,10 +1248,10 @@ macro_rules! tim13 { pwm_pin_for_pwm_channel!(TIM13, TIM13_CH1, u16, cc1e, ccr1, ccr); // Pins - pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pa6, PA6, AF9); - pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pa9, PA9, AF2); - pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pb3, PB3, AF9); - pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pc4, PC4, AF2); + pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pa6, gpioa::PA6); + pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pa9, gpioa::PA9); + pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pb3, gpiob::PB3); + pwm_channel1_pin!(TIM13, TIM13_CH1, output_to_pc4, gpioc::PC4); }; } @@ -1452,10 +1291,10 @@ macro_rules! tim14 { pwm_pin_for_pwm_channel!(TIM14, TIM14_CH1, u16, cc1e, ccr1, ccr); // Pins - pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pa5, PA5, AF9); - pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pa7, PA7, AF9); - pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pa10, PA10, AF9); - pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pf9, PF9, AF2); + pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pa5, gpioa::PA5); + pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pa7, gpioa::PA7); + pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pa10, gpioa::PA10); + pwm_channel1_pin!(TIM14, TIM14_CH1, output_to_pf9, gpiof::PF9); }; } @@ -1483,12 +1322,15 @@ pwm_pin_for_pwm_n_channel!(TIM15, TIM15_CH1, u16, cc1e, cc1ne, ccr1, ccr1); pwm_pin_for_pwm_channel!(TIM15, TIM15_CH2, u16, cc2e, ccr2, ccr2); // Pins -pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pa2, PA2, AF9); +pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pa2, gpioa::PA2); #[cfg(any(feature = "stm32f373", feature = "stm32f378"))] -pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pb6, PB6, AF9); -pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pb14, PB14, AF1); +pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pb6, gpiob::PB6); +pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pb14, gpiob::PB14); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1496,16 +1338,19 @@ pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pb14, PB14, AF1); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pf9, PF9, AF3); +pwm_channel1_pin!(TIM15, TIM15_CH1, output_to_pf9, gpiof::PF9); -pwm_channel1n_pin!(TIM15, TIM15_CH1, output_to_pa1, PA1, AF9); -pwm_channel1n_pin!(TIM15, TIM15_CH1, output_to_pb15, PB15, AF2); -pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pa3, PA3, AF9); +pwm_channel1n_pin!(TIM15, TIM15_CH1, output_to_pa1, gpioa::PA1); +pwm_channel1n_pin!(TIM15, TIM15_CH1, output_to_pb15, gpiob::PB15); +pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pa3, gpioa::PA3); #[cfg(any(feature = "stm32f373", feature = "stm32f378"))] -pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pb7, PB7, AF9); -pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pb15, PB15, AF2); +pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pb7, gpiob::PB7); +pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pb15, gpiob::PB15); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1513,7 +1358,7 @@ pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pb15, PB15, AF2); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pf10, PF10, AF3); +pwm_channel2_pin!(TIM15, TIM15_CH2, output_to_pf10, gpiof::PF10); // TIM16 @@ -1534,12 +1379,15 @@ pwm_timer_with_break!( pwm_pin_for_pwm_n_channel!(TIM16, TIM16_CH1, u16, cc1e, cc1ne, ccr1, ccr1); // Pins -pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pa9, PA6, AF1); -pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pa12, PA12, AF1); -pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pb4, PB4, AF1); -pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pb8, PB8, AF1); +pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pa9, gpioa::PA6); +pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pa12, gpioa::PA12); +pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pb4, gpiob::PB4); +pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pb8, gpiob::PB8); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1547,10 +1395,10 @@ pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pb8, PB8, AF1); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pe0, PE0, AF4); +pwm_channel1_pin!(TIM16, TIM16_CH1, output_to_pe0, gpioe::PE0); -pwm_channel1n_pin!(TIM16, TIM16_CH1, output_to_pa13, PA13, AF1); -pwm_channel1n_pin!(TIM16, TIM16_CH1, output_to_pb6, PB6, AF1); +pwm_channel1n_pin!(TIM16, TIM16_CH1, output_to_pa13, gpioa::PA13); +pwm_channel1n_pin!(TIM16, TIM16_CH1, output_to_pb6, gpiob::PB6); // TIM17 @@ -1571,11 +1419,14 @@ pwm_timer_with_break!( pwm_pin_for_pwm_n_channel!(TIM17, TIM17_CH1, u16, cc1e, cc1ne, ccr1, ccr1); // Pins -pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pa7, PA7, AF1); -pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pb5, PB5, AF10); -pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pb9, PB9, AF1); +pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pa7, gpioa::PA7); +pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pb5, gpiob::PB5); +pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pb9, gpiob::PB9); #[cfg(any( - feature = "stm32f302", + feature = "stm32f302xb", + feature = "stm32f302xc", + feature = "stm32f302xd", + feature = "stm32f302xe", feature = "stm32f303xb", feature = "stm32f303xc", feature = "stm32f303xd", @@ -1583,9 +1434,9 @@ pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pb9, PB9, AF1); feature = "stm32f358", feature = "stm32f398" ))] -pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pe1, PE1, AF4); +pwm_channel1_pin!(TIM17, TIM17_CH1, output_to_pe1, gpioe::PE1); -pwm_channel1n_pin!(TIM17, TIM17_CH1, output_to_pa13, PA13, AF1); +pwm_channel1n_pin!(TIM17, TIM17_CH1, output_to_pa13, gpioa::PA13); // TIM19 @@ -1623,21 +1474,21 @@ macro_rules! tim19 { pwm_pin_for_pwm_channel!(TIM19, TIM19_CH4, u16, cc4e, ccr4, ccr); // Pins - pwm_channel1_pin!(TIM19, TIM19_CH1, output_to_pa0, PA0, AF11); - pwm_channel1_pin!(TIM19, TIM19_CH1, output_to_pb6, PB6, AF11); - pwm_channel1_pin!(TIM19, TIM19_CH1, output_to_pc10, PC10, AF2); + pwm_channel1_pin!(TIM19, TIM19_CH1, output_to_pa0, gpioa::PA0); + pwm_channel1_pin!(TIM19, TIM19_CH1, output_to_pb6, gpiob::PB6); + pwm_channel1_pin!(TIM19, TIM19_CH1, output_to_pc10, gpioc::PC10); - pwm_channel2_pin!(TIM19, TIM19_CH2, output_to_pa1, PA1, AF11); - pwm_channel2_pin!(TIM19, TIM19_CH2, output_to_pb7, PB7, AF11); - pwm_channel2_pin!(TIM19, TIM19_CH2, output_to_pc11, PC11, AF2); + pwm_channel2_pin!(TIM19, TIM19_CH2, output_to_pa1, gpioa::PA1); + pwm_channel2_pin!(TIM19, TIM19_CH2, output_to_pb7, gpiob::PB7); + pwm_channel2_pin!(TIM19, TIM19_CH2, output_to_pc11, gpioc::PC11); - pwm_channel3_pin!(TIM19, TIM19_CH3, output_to_pa2, PA2, AF11); - pwm_channel3_pin!(TIM19, TIM19_CH3, output_to_pb8, PB8, AF11); - pwm_channel3_pin!(TIM19, TIM19_CH3, output_to_pc12, PC12, AF2); + pwm_channel3_pin!(TIM19, TIM19_CH3, output_to_pa2, gpioa::PA2); + pwm_channel3_pin!(TIM19, TIM19_CH3, output_to_pb8, gpiob::PB8); + pwm_channel3_pin!(TIM19, TIM19_CH3, output_to_pc12, gpioc::PC12); - pwm_channel4_pin!(TIM19, TIM19_CH4, output_to_pa3, PA3, AF11); - pwm_channel4_pin!(TIM19, TIM19_CH4, output_to_pb9, PB9, AF11); - pwm_channel4_pin!(TIM19, TIM19_CH4, output_to_pd0, PD0, AF2); + pwm_channel4_pin!(TIM19, TIM19_CH4, output_to_pa3, gpioa::PA3); + pwm_channel4_pin!(TIM19, TIM19_CH4, output_to_pb9, gpiob::PB9); + pwm_channel4_pin!(TIM19, TIM19_CH4, output_to_pd0, gpiod::PD0); }; } @@ -1679,9 +1530,9 @@ macro_rules! tim20 { pwm_pin_for_pwm_n_channel!(TIM20, TIM20_CH1, u16, cc1e, cc1ne, ccr1, ccr1); //Pins - pwm_channel1_pin!(TIM20, TIM20_CH1, output_to_pe2, PE2, AF6); + pwm_channel1_pin!(TIM20, TIM20_CH1, output_to_pe2, gpioe::PE2); - pwm_channel1n_pin!(TIM20, TIM20_CH1, output_to_pe4, PE4, AF6); + pwm_channel1n_pin!(TIM20, TIM20_CH1, output_to_pe4, gpioe::PE4); }; } diff --git a/src/rtc.rs b/src/rtc.rs index 6a4bed284..7dd8cd71e 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -42,7 +42,7 @@ impl Rtc { enable(bdcr); result.set_24h_fmt(); - result.regs.prer.modify(|_, w| unsafe { + result.regs.prer.modify(|_, w| { w.prediv_s().bits(prediv_s); w.prediv_a().bits(prediv_a) }); @@ -99,7 +99,7 @@ impl Rtcc for Rtc { let (ht, hu) = bcd2_encode(time.hour())?; let (mnt, mnu) = bcd2_encode(time.minute())?; let (st, su) = bcd2_encode(time.second())?; - self.regs.tr.write(|w| unsafe { + self.regs.tr.write(|w| { w.ht().bits(ht); w.hu().bits(hu); w.mnt().bits(mnt); @@ -117,10 +117,7 @@ impl Rtcc for Rtc { return Err(Error::InvalidInputData); } let (st, su) = bcd2_encode(seconds as u32)?; - self.modify(|regs| { - regs.tr - .modify(|_, w| unsafe { w.st().bits(st).su().bits(su) }) - }); + self.modify(|regs| regs.tr.modify(|_, w| w.st().bits(st).su().bits(su))); Ok(()) } @@ -130,10 +127,7 @@ impl Rtcc for Rtc { return Err(Error::InvalidInputData); } let (mnt, mnu) = bcd2_encode(minutes as u32)?; - self.modify(|regs| { - regs.tr - .modify(|_, w| unsafe { w.mnt().bits(mnt).mnu().bits(mnu) }) - }); + self.modify(|regs| regs.tr.modify(|_, w| w.mnt().bits(mnt).mnu().bits(mnu))); Ok(()) } @@ -145,9 +139,7 @@ impl Rtcc for Rtc { Hours::AM(_h) | Hours::PM(_h) => self.set_12h_fmt(), } - self.regs - .tr - .modify(|_, w| unsafe { w.ht().bits(ht).hu().bits(hu) }); + self.regs.tr.modify(|_, w| w.ht().bits(ht).hu().bits(hu)); Ok(()) } @@ -166,10 +158,7 @@ impl Rtcc for Rtc { return Err(Error::InvalidInputData); } let (dt, du) = bcd2_encode(day as u32)?; - self.modify(|regs| { - regs.dr - .modify(|_, w| unsafe { w.dt().bits(dt).du().bits(du) }) - }); + self.modify(|regs| regs.dr.modify(|_, w| w.dt().bits(dt).du().bits(du))); Ok(()) } @@ -179,10 +168,7 @@ impl Rtcc for Rtc { return Err(Error::InvalidInputData); } let (mt, mu) = bcd2_encode(month as u32)?; - self.modify(|regs| { - regs.dr - .modify(|_, w| unsafe { w.mt().bit(mt > 0).mu().bits(mu) }) - }); + self.modify(|regs| regs.dr.modify(|_, w| w.mt().bit(mt > 0).mu().bits(mu))); Ok(()) } @@ -192,10 +178,7 @@ impl Rtcc for Rtc { return Err(Error::InvalidInputData); } let (yt, yu) = bcd2_encode(year as u32)?; - self.modify(|regs| { - regs.dr - .modify(|_, w| unsafe { w.yt().bits(yt).yu().bits(yu) }) - }); + self.modify(|regs| regs.dr.modify(|_, w| w.yt().bits(yt).yu().bits(yu))); Ok(()) } @@ -211,7 +194,7 @@ impl Rtcc for Rtc { let (mt, mu) = bcd2_encode(date.month())?; let (dt, du) = bcd2_encode(date.day())?; - self.regs.dr.write(|w| unsafe { + self.regs.dr.write(|w| { w.dt().bits(dt); w.du().bits(du); w.mt().bit(mt > 0); @@ -237,7 +220,7 @@ impl Rtcc for Rtc { let (mnt, mnu) = bcd2_encode(date.minute())?; let (st, su) = bcd2_encode(date.second())?; - self.regs.dr.write(|w| unsafe { + self.regs.dr.write(|w| { w.dt().bits(dt); w.du().bits(du); w.mt().bit(mt > 0); @@ -246,7 +229,7 @@ impl Rtcc for Rtc { w.yu().bits(yu) }); - self.regs.tr.write(|w| unsafe { + self.regs.tr.write(|w| { w.ht().bits(ht); w.hu().bits(hu); w.mnt().bits(mnt); diff --git a/src/serial.rs b/src/serial.rs index 6f0740677..1723355d5 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -7,40 +7,15 @@ use crate::{ rcc::{Clocks, APB1, APB2}, time::Bps, }; +use cfg_if::cfg_if; use core::{convert::Infallible, marker::PhantomData, ptr}; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpiod; -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -use crate::gpio::gpioe; - -#[cfg(any(feature = "stm32f302", feature = "stm32f303"))] -use crate::dma; -#[cfg(any(feature = "stm32f302", feature = "stm32f303"))] -use cortex_m::interrupt; +cfg_if! { + if #[cfg(any(feature = "stm32f302", feature = "stm32f303"))] { + use crate::dma; + use cortex_m::interrupt; + } +} /// Interrupt event pub enum Event { @@ -74,129 +49,41 @@ pub unsafe trait RxPin {} unsafe impl TxPin for gpioa::PA9 {} unsafe impl TxPin for gpiob::PB6 {} unsafe impl TxPin for gpioc::PC4 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl TxPin for gpioe::PE0 {} - unsafe impl RxPin for gpioa::PA10 {} unsafe impl RxPin for gpiob::PB7 {} unsafe impl RxPin for gpioc::PC5 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl RxPin for gpioe::PE1 {} unsafe impl TxPin for gpioa::PA2 {} -// unsafe impl TxPin for gpioa::PA14 {} -// unsafe impl TxPin for gpiob::PB3 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl TxPin for gpiod::PD5 {} - +unsafe impl TxPin for gpiob::PB3 {} unsafe impl RxPin for gpioa::PA3 {} -// unsafe impl RxPin for gpioa::PA15 {} -// unsafe impl RxPin for gpiob::PB4 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl RxPin for gpiod::PD6 {} +unsafe impl RxPin for gpiob::PB4 {} unsafe impl TxPin for gpiob::PB10 {} unsafe impl TxPin for gpioc::PC10 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl TxPin for gpiod::PD8 {} - -#[cfg(any( - feature = "stm32f301", - feature = "stm32f318", - feature = "stm32f302", - feature = "stm32f303", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl RxPin for gpiob::PB11 {} unsafe impl RxPin for gpioc::PC11 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f334", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl RxPin for gpiod::PD9 {} -#[cfg(any( - feature = "stm32f302", - feature = "stm32f303xb", - feature = "stm32f303xc", - feature = "stm32f303xd", - feature = "stm32f303xe", - feature = "stm32f373", - feature = "stm32f378", - feature = "stm32f328", - feature = "stm32f358", - feature = "stm32f398" -))] -unsafe impl RxPin for gpioe::PE15 {} + +cfg_if! { + if #[cfg(any(feature = "gpio-f303", feature = "gpio-f303e", feature = "gpio-f373"))] { + use crate::gpio::{gpiod, gpioe}; + + unsafe impl TxPin for gpioe::PE0 {} + unsafe impl RxPin for gpioe::PE1 {} + + unsafe impl TxPin for gpiod::PD5 {} + unsafe impl RxPin for gpiod::PD6 {} + + unsafe impl TxPin for gpiod::PD8 {} + unsafe impl RxPin for gpiod::PD9 {} + unsafe impl RxPin for gpioe::PE15 {} + } +} +cfg_if! { + if #[cfg(not(feature = "gpio-f373"))] { + unsafe impl TxPin for gpioa::PA14 {} + unsafe impl RxPin for gpioa::PA15 {} + unsafe impl RxPin for gpiob::PB11 {} + } +} /// Serial abstraction pub struct Serial { @@ -378,7 +265,8 @@ macro_rules! hal { { // NOTE(unsafe) taking the address of a register let pa = unsafe { &(*$USARTX::ptr()).rdr } as *const _ as u32; - channel.set_peripheral_address(pa, dma::Increment::Disable); + // NOTE(unsafe) usage of a valid peripheral address + unsafe { channel.set_peripheral_address(pa, dma::Increment::Disable) }; dma::Transfer::start_write(buffer, channel, self) } @@ -399,7 +287,8 @@ macro_rules! hal { { // NOTE(unsafe) taking the address of a register let pa = unsafe { &(*$USARTX::ptr()).tdr } as *const _ as u32; - channel.set_peripheral_address(pa, dma::Increment::Disable); + // NOTE(unsafe) usage of a valid peripheral address + unsafe { channel.set_peripheral_address(pa, dma::Increment::Disable) }; dma::Transfer::start_read(buffer, channel, self) }