From 2d3ff200b4c76dce1a74926938e579c2393b727d Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Wed, 11 Dec 2024 21:56:40 -0800 Subject: [PATCH] Fix regression-wally --fcov --- sim/questa/wally.do | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sim/questa/wally.do b/sim/questa/wally.do index 3c7046a37..1b3c19393 100644 --- a/sim/questa/wally.do +++ b/sim/questa/wally.do @@ -104,10 +104,10 @@ if {[lcheck lst "--ccov"]} { # if --fcov found set flag and remove from list if {[lcheck lst "--fcov"]} { set FunctCoverage 1 - set FCvlog "+incdir+$env(WALLY)/addins/cvw-arch-verif/riscvISACOV/source \ - +incdir+${FCRVVI}/rv32 +incdir+${FCRVVI}/rv64 \ + set FCvlog "+incdir+${FCRVVI}/rv32 +incdir+${FCRVVI}/rv64 \ +incdir+${FCRVVI}/priv +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/rv32_priv \ - +incdir+${FCRVVI}/common +incdir+${FCRVVI}" + +incdir+${FCRVVI}/common +incdir+${FCRVVI} \ + +incdir+$env(WALLY)/addins/cvw-arch-verif/riscvISACOV/source" } # if --lockstep or --fcov found set flag and remove from list @@ -164,7 +164,7 @@ if {$DEBUG > 0} { # because vsim will run vopt set INC_DIRS "+incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared" set SOURCES "${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*/*/*.sv" -vlog -permissive -lint -work ${WKDIR} {*}${INC_DIRS} {*}${DefineArgs} {*}${FCvlog} {*}${lockstepvlog} {*}${SOURCES} -suppress 2282,2583,7053,7063,2596,13286 +vlog -permissive -lint -work ${WKDIR} {*}${INC_DIRS} {*}${FCvlog} {*}${DefineArgs} {*}${lockstepvlog} {*}${SOURCES} -suppress 2282,2583,7053,7063,2596,13286 # start and run simulation # remove +acc flag for faster sim during regressions if there is no need to access internal signals