From 9e581ea622c881599fbfa7bfe3c776adf991bc5f Mon Sep 17 00:00:00 2001
From: ligenxxxx <59721724+ligenxxxx@users.noreply.github.com>
Date: Thu, 28 Nov 2024 17:00:04 +0800
Subject: [PATCH] force av in clock phase

---
 src/driver/hardware.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/src/driver/hardware.c b/src/driver/hardware.c
index a4f7f4f0..2a2b3a29 100644
--- a/src/driver/hardware.c
+++ b/src/driver/hardware.c
@@ -292,11 +292,14 @@ void vclk_phase_init() {
 }
 
 void vclk_phase_set(video_source_t source, uint8_t reg_8d_sel) {
-
-    if (reg_8d_sel)
-        I2C_Write(ADDR_FPGA, 0x8d, (((vclk_phase[source] >> 24) & 0xff) ^ (1 << 4)));
-    else
-        I2C_Write(ADDR_FPGA, 0x8d, (vclk_phase[source] >> 24) & 0xff);
+    if(source == VIDEO_SOURCE_AV_IN) // force av in clock phase
+        I2C_Write(ADDR_FPGA, 0x8d, 0x14);
+    else {
+        if (reg_8d_sel)
+            I2C_Write(ADDR_FPGA, 0x8d, (((vclk_phase[source] >> 24) & 0xff) ^ (1 << 4)));
+        else
+            I2C_Write(ADDR_FPGA, 0x8d, (vclk_phase[source] >> 24) & 0xff);
+    }
 
     I2C_Write(ADDR_FPGA, 0x8e, (vclk_phase[source] >> 16) & 0xff);
     I2C_Write(ADDR_AL, 0x14, (vclk_phase[source] >> 8) & 0xff);