From 6c63b5851c3ae6a4237cbd82f791a2644ce1fd12 Mon Sep 17 00:00:00 2001 From: Dimitris Mantzouranis Date: Thu, 27 Oct 2022 21:30:34 +0300 Subject: [PATCH 1/2] Sonix SN32 platform support Squashed commit of the following: commit c2a505582c7f2acb70d402a52bd28dc66d1812e4 Merge: 74b1b548a7 0c6e12c491 Author: dexter93 Date: Thu Oct 27 21:21:55 2022 +0300 Merge pull request #12 from dexter93/revert-11-sn32_up_wl Revert "Wear Leveling driver for SN32 platform" commit 0c6e12c4912a0d7479e3d614a86d9dc728247832 Author: dexter93 Date: Thu Oct 27 21:21:35 2022 +0300 Revert "Wear Leveling driver for SN32 platform" commit 74b1b548a7344895eb418fb72597b9fe84c3a439 Merge: 95b9528b25 3f4d1cb504 Author: dexter93 Date: Thu Oct 27 19:35:46 2022 +0300 Merge pull request #11 from Jpe230/sn32_up_wl Wear Leveling driver for SN32 platform commit 3f4d1cb504fa947bac8bd3e6156325c980c50ad5 Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:42:04 2022 -0500 Change page count commit 77f358d65c6d10ab9886ac72c7569cf161c5b57a Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:32:43 2022 -0500 Rename SN32 WL driver, guard the last page commit 40a8d85167d98905041d740d2742e4cae1c3b8b8 Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:14:22 2022 -0500 Fix typo on store_erase commit 95b9528b258df23ad05fbcbb759000a48f802552 Author: Dimitris Mantzouranis Date: Wed Oct 12 23:11:54 2022 +0300 260: cleanup config.h commit 2dc6b43ca20eafb9e75363cf9bde977bd2327761 Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:05:41 2022 -0500 Wear-Leveling driver for SN32 platform commit b21897a5a751650fe325a64b62c8f169ca79901d Author: Dimitris Mantzouranis Date: Wed Oct 12 22:50:33 2022 +0300 more config cleanup commit 4660b56ffb8da37293b925172e890b984de2f572 Author: Dimitris Mantzouranis Date: Wed Oct 12 22:37:36 2022 +0300 move usb specifics out of chibios configs commit d6c60575b6e74624ec15c05dceec702212f32f35 Author: Dimitris Mantzouranis Date: Wed Oct 12 22:02:43 2022 +0300 apparently you can just cheese the preprocessor nice commit 7c847581c569c689b367d5fec6f41dff55416b50 Author: Dimitris Mantzouranis Date: Wed Oct 12 21:58:44 2022 +0300 Revert "common chconf.h: allow custom idle hooks" This reverts commit 92d5f9989ad0c0f740d70167966a3d937d272fbb. commit 92d5f9989ad0c0f740d70167966a3d937d272fbb Author: Dimitris Mantzouranis Date: Wed Oct 12 21:17:08 2022 +0300 common chconf.h: allow custom idle hooks commit a39707f4746f0635dcad2dc81a84e01dd2d3b394 Author: Dimitris Mantzouranis Date: Wed Oct 12 21:06:45 2022 +0300 fall back to periodic tic timers aren't as good as we'd like. The VT in charge of them causes mayhem on double-buffered timers like CT16, resulting in random timekeeping commit 2e95cef89a68dbcc6788ec9093c89f1d3e8c69b5 Author: Dimitris Mantzouranis Date: Wed Oct 12 21:02:01 2022 +0300 260: add board specific chconf commit 78ee352b1a6520daa408cfbab1d1ff99f41f7b31 Author: Dimitris Mantzouranis Date: Wed Oct 12 20:59:10 2022 +0300 simplify configs based on common ones commit 33a4e823a0f224c4f8bc930ef7e69b071566c24f Author: Dimitris Mantzouranis Date: Wed Oct 12 20:53:20 2022 +0300 remove old eeprom code commit 90d9af272769a99b356c2c8520f03b23a733b20f Author: pablin.123.ra@gmail.com Date: Sat Oct 8 17:15:16 2022 -0500 Fix jsonschema, fix missing mcu_reset commit 14e35416cec31b440c2ae93000ccb5379981241a Author: pablin.123.ra@gmail.com Date: Sat Oct 8 17:10:26 2022 -0500 Add OneKey commit 420b9137036f9de495ec711ed21a9aa106148a70 Author: pablin.123.ra@gmail.com Date: Sat Oct 8 17:04:49 2022 -0500 Update BL commit 4f4408a3285a827d8489d7b6ddb0b85e92ad59da Author: pablin.123.ra@gmail.com Date: Sat Oct 8 17:03:32 2022 -0500 Squashed commit of the following: commit 0533d612940cebf23913dbdf8830e08c8508069b Author: Nick Brassel Date: Thu Jul 7 08:56:39 2022 +1000 Update keyboard.jsonschema Oops. commit 95d6beb514afa60c3833a26e185e9ff58f35a7b7 Merge: ea8b4d861c 744af003be Author: Nick Brassel Date: Thu Jul 7 08:55:27 2022 +1000 Merge branch 'develop' into sonix commit ea8b4d861c33b86a8ab9ffda524c064367e80f1b Author: Dimitris Mantzouranis Date: Sun Feb 13 15:23:10 2022 +0200 update configs for chibios 2.11 commit 45fd6d3762c051f98507423a56486b83d57e838b Author: Dimitris Mantzouranis Date: Thu Mar 3 18:31:14 2022 +0200 use wait function for bootloader_jump commit 3a3b6214f1b68d0f01ce26e8246b6af3a951fec6 Author: Dimitris Mantzouranis Date: Thu Mar 3 17:41:48 2022 +0200 add sonix sn32 in docs commit 4fbcb682fa8e9cdd6efd0099ea3b5e9018efb8cc Author: Dimitris Mantzouranis Date: Thu Mar 3 14:57:18 2022 +0200 sonix sn32f2xx platform support --- builddefs/mcu_selection.mk | 96 +++++++++++++++++++ data/schemas/keyboard.jsonschema | 6 +- docs/compatible_microcontrollers.md | 6 ++ keyboards/handwired/onekey/sn32/config.h | 6 ++ keyboards/handwired/onekey/sn32/info.json | 9 ++ keyboards/handwired/onekey/sn32/rules.mk | 0 lib/python/qmk/constants.py | 5 +- .../chibios/boards/SN_SN32F240/board/board.mk | 12 +++ .../boards/SN_SN32F240/configs/chconf.h | 27 ++++++ .../boards/SN_SN32F240/configs/mcuconf.h | 68 +++++++++++++ .../boards/SN_SN32F240B/board/board.mk | 16 ++++ .../boards/SN_SN32F240B/configs/chconf.h | 38 ++++++++ .../boards/SN_SN32F240B/configs/halconf.h | 27 ++++++ .../boards/SN_SN32F240B/configs/mcuconf.h | 69 +++++++++++++ .../chibios/boards/SN_SN32F260/board/board.mk | 22 +++++ .../boards/SN_SN32F260/configs/chconf.h | 62 ++++++++++++ .../boards/SN_SN32F260/configs/config.h | 20 ++++ .../boards/SN_SN32F260/configs/mcuconf.h | 70 ++++++++++++++ platforms/chibios/bootloader.mk | 5 + platforms/chibios/bootloaders/sn32_dfu.c | 52 ++++++++++ platforms/chibios/chibios_config.h | 4 + platforms/chibios/platform.mk | 4 + 22 files changed, 622 insertions(+), 2 deletions(-) create mode 100644 keyboards/handwired/onekey/sn32/config.h create mode 100644 keyboards/handwired/onekey/sn32/info.json create mode 100644 keyboards/handwired/onekey/sn32/rules.mk create mode 100644 platforms/chibios/boards/SN_SN32F240/board/board.mk create mode 100644 platforms/chibios/boards/SN_SN32F240/configs/chconf.h create mode 100644 platforms/chibios/boards/SN_SN32F240/configs/mcuconf.h create mode 100644 platforms/chibios/boards/SN_SN32F240B/board/board.mk create mode 100644 platforms/chibios/boards/SN_SN32F240B/configs/chconf.h create mode 100644 platforms/chibios/boards/SN_SN32F240B/configs/halconf.h create mode 100644 platforms/chibios/boards/SN_SN32F240B/configs/mcuconf.h create mode 100644 platforms/chibios/boards/SN_SN32F260/board/board.mk create mode 100644 platforms/chibios/boards/SN_SN32F260/configs/chconf.h create mode 100644 platforms/chibios/boards/SN_SN32F260/configs/config.h create mode 100644 platforms/chibios/boards/SN_SN32F260/configs/mcuconf.h create mode 100644 platforms/chibios/bootloaders/sn32_dfu.c diff --git a/builddefs/mcu_selection.mk b/builddefs/mcu_selection.mk index 0ea9630d598e..a289381c81a6 100644 --- a/builddefs/mcu_selection.mk +++ b/builddefs/mcu_selection.mk @@ -815,6 +815,102 @@ ifneq ($(findstring GD32VF103, $(MCU)),) USE_FPU ?= no endif +ifneq ($(findstring SN32F248F, $(MCU)),) + # Cortex version + MCU = cortex-m0 + + # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 + ARMV = 6 + + ## chip/board settings + # - the next two should match the directories in + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + MCU_FAMILY = SN32 + MCU_SERIES = SN32F240 + + # Linker script to use + # - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ + # or /ld/ + MCU_LDSCRIPT ?= SN32F240 + + # Startup code to use + # - it should exist in /os/common/startup/ARMCMx/compilers/GCC/mk/ + MCU_STARTUP ?= sn32f24x + + # Board: it should exist either in /os/hal/boards/, + # /boards/, or drivers/boards/ + BOARD ?= SN_SN32F240 + + USE_FPU ?= no + + # Bootloader address for SN32 DFU + SN32_BOOTLOADER_ADDRESS = 0x1FFF0301 +endif + +ifneq ($(findstring SN32F248BF, $(MCU)),) + # Cortex version + MCU = cortex-m0 + + # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 + ARMV = 6 + + ## chip/board settings + # - the next two should match the directories in + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + MCU_FAMILY = SN32 + MCU_SERIES = SN32F240B + + # Linker script to use + # - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ + # or /ld/ + MCU_LDSCRIPT ?= SN32F240B + + # Startup code to use + # - it should exist in /os/common/startup/ARMCMx/compilers/GCC/mk/ + MCU_STARTUP ?= sn32f24xb + + # Board: it should exist either in /os/hal/boards/, + # /boards/, or drivers/boards/ + BOARD ?= SN_SN32F240B + + USE_FPU ?= no + + # Bootloader address for SN32 DFU + SN32_BOOTLOADER_ADDRESS = 0x1FFF0301 +endif + +ifneq ($(findstring SN32F268F, $(MCU)),) + # Cortex version + MCU = cortex-m0 + + # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 + ARMV = 6 + + ## chip/board settings + # - the next two should match the directories in + # /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) + MCU_FAMILY = SN32 + MCU_SERIES = SN32F260 + + # Linker script to use + # - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ + # or /ld/ + MCU_LDSCRIPT ?= SN32F260 + + # Startup code to use + # - it should exist in /os/common/startup/ARMCMx/compilers/GCC/mk/ + MCU_STARTUP ?= sn32f26x + + # Board: it should exist either in /os/hal/boards/, + # /boards/, or drivers/boards/ + BOARD ?= SN_SN32F260 + + USE_FPU ?= no + + # Bootloader address for SN32 DFU + SN32_BOOTLOADER_ADDRESS = 0x1FFF0009 +endif + ifneq (,$(filter $(MCU),at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647 at90usb1286 at90usb1287)) PROTOCOL = LUFA diff --git a/data/schemas/keyboard.jsonschema b/data/schemas/keyboard.jsonschema index bc07eaf5fbda..2f4bca129880 100644 --- a/data/schemas/keyboard.jsonschema +++ b/data/schemas/keyboard.jsonschema @@ -59,6 +59,9 @@ "MK64FX512", "MK66FX1M0", "RP2040", + "SN32F248F", + "SN32F248BF", + "SN32F268F", "STM32F042", "STM32F072", "STM32F103", @@ -155,7 +158,8 @@ "tinyuf2", "unknown", "usbasploader", - "wb32-dfu" + "wb32-dfu", + "sn32-dfu" ] }, "bootloader_instructions": { diff --git a/docs/compatible_microcontrollers.md b/docs/compatible_microcontrollers.md index cc9c0b7f92a2..5f988a38fec0 100644 --- a/docs/compatible_microcontrollers.md +++ b/docs/compatible_microcontrollers.md @@ -73,6 +73,12 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s For a detailed overview about the RP2040 support by QMK see the [dedicated RP2040 page](platformdev_rp2040.md). +### Sonix (SN32) + + * [SN32F24x](https://www.sonix.com.tw/article-en-998-21396) + * [SN32F24xB](https://www.sonix.com.tw/article-en-4336-30356) + * [SN32F26x](https://www.sonix.com.tw/article-en-998-24753) + ## Atmel ATSAM There is limited support for one of Atmel's ATSAM microcontrollers, that being the [ATSAMD51J18A](https://www.microchip.com/wwwproducts/en/ATSAMD51J18A) used by the [Massdrop keyboards](https://github.com/qmk/qmk_firmware/tree/master/keyboards/massdrop). However, it is not recommended to design a board with this microcontroller as the support is quite specialized to Massdrop hardware. diff --git a/keyboards/handwired/onekey/sn32/config.h b/keyboards/handwired/onekey/sn32/config.h new file mode 100644 index 000000000000..c73942c449c7 --- /dev/null +++ b/keyboards/handwired/onekey/sn32/config.h @@ -0,0 +1,6 @@ +// Copyright 2022 Jpe230 +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include "config_common.h" diff --git a/keyboards/handwired/onekey/sn32/info.json b/keyboards/handwired/onekey/sn32/info.json new file mode 100644 index 000000000000..3f09cabc6083 --- /dev/null +++ b/keyboards/handwired/onekey/sn32/info.json @@ -0,0 +1,9 @@ +{ + "keyboard_name": "Onekey SN32", + "processor": "SN32F248BF", + "bootloader": "sn32-dfu", + "matrix_pins": { + "cols": ["A8"], + "rows": ["D11"] + } +} diff --git a/keyboards/handwired/onekey/sn32/rules.mk b/keyboards/handwired/onekey/sn32/rules.mk new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/lib/python/qmk/constants.py b/lib/python/qmk/constants.py index 8a13029a8a8f..c34176021173 100644 --- a/lib/python/qmk/constants.py +++ b/lib/python/qmk/constants.py @@ -14,7 +14,7 @@ MAX_KEYBOARD_SUBFOLDERS = 5 # Supported processor types -CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK64FX512', 'MK66FX1M0', 'RP2040', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F405', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L432', 'STM32L433', 'STM32L442', 'STM32L443', 'GD32VF103', 'WB32F3G71', 'WB32FQ95' +CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK64FX512', 'MK66FX1M0', 'RP2040', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F405', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L432', 'STM32L433', 'STM32L442', 'STM32L443', 'GD32VF103', 'WB32F3G71', 'WB32FQ95', 'SN32F248F', 'SN32F248BF', 'SN32F268F' LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85' @@ -45,6 +45,9 @@ "GD32VF103": "gd32v-dfu", "WB32F3G71": "wb32-dfu", "WB32FQ95": "wb32-dfu", + "SN32F248F": "sn32-dfu", + "SN32F248BF": "sn32-dfu", + "SN32F268F": "sn32-dfu", "atmega16u2": "atmel-dfu", "atmega32u2": "atmel-dfu", "atmega16u4": "atmel-dfu", diff --git a/platforms/chibios/boards/SN_SN32F240/board/board.mk b/platforms/chibios/boards/SN_SN32F240/board/board.mk new file mode 100644 index 000000000000..ee50903bf28f --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F240/board/board.mk @@ -0,0 +1,12 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS_CONTRIB)/os/hal/boards/SN_SN32F240/board.c + +# Required include directories +BOARDINC = $(CHIBIOS_CONTRIB)/os/hal/boards/SN_SN32F240 + +# Optimize for speed +OPT = 2 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) \ No newline at end of file diff --git a/platforms/chibios/boards/SN_SN32F240/configs/chconf.h b/platforms/chibios/boards/SN_SN32F240/configs/chconf.h new file mode 100644 index 000000000000..f698a1885926 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F240/configs/chconf.h @@ -0,0 +1,27 @@ +/* Copyright 2020 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* + * This file was auto-generated by: + * `qmk chibios-confmigrate -i platforms/chibios/boards/SN_SN32F240/configs/chconf.h -r platforms/chibios/boards/common/configs/chconf.h` + */ + +#pragma once + +#define CH_CFG_ST_TIMEDELTA 0 + +#include_next + diff --git a/platforms/chibios/boards/SN_SN32F240/configs/mcuconf.h b/platforms/chibios/boards/SN_SN32F240/configs/mcuconf.h new file mode 100644 index 000000000000..a1ec5166b7a7 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F240/configs/mcuconf.h @@ -0,0 +1,68 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * SN32F24x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define SN32F24x_MCUCONF +#define PLATFORM_MCUCONF +/* + * HAL driver system settings. + */ +/* + * CT driver system settings. + */ +#define SN32_HAS_CT16B0 TRUE +#define SN32_HAS_CT16B1 TRUE + +/* + * SN driver system settings. + */ +#define SN32_HAS_GPIOA TRUE +#define SN32_HAS_GPIOB TRUE +#define SN32_HAS_GPIOC TRUE +#define SN32_HAS_GPIOD TRUE + +/* + * USB driver system settings. + */ +#define CRT1_AREAS_NUMBER 1 +#define PLATFORM_USB_USE_USB1 TRUE + +/* + * Timer driver system settings. + */ +#define SYS_CLOCK_SETUP 1 +#define SYS0_CLKCFG_VAL 0 +#define AHB_PRESCALAR 0x2 +#define CLKOUT_SEL_VAL 0x0 +#define CLKOUT_PRESCALAR 0x0 + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/boards/SN_SN32F240B/board/board.mk b/platforms/chibios/boards/SN_SN32F240B/board/board.mk new file mode 100644 index 000000000000..b3cf15dd678c --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F240B/board/board.mk @@ -0,0 +1,16 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS_CONTRIB)/os/hal/boards/SN_SN32F240B/board.c + +# Required include directories +BOARDINC = $(CHIBIOS_CONTRIB)/os/hal/boards/SN_SN32F240B + +# Optimize for speed +OPT = 2 +# Enter lower-power sleep mode when on the ChibiOS idle thread +OPT_DEFS += -DCORTEX_ENABLE_WFI_IDLE=TRUE +# Shave some extra bytes +OPT_DEFS += -DCRT1_AREAS_NUMBER=1 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/boards/SN_SN32F240B/configs/chconf.h b/platforms/chibios/boards/SN_SN32F240B/configs/chconf.h new file mode 100644 index 000000000000..e33f469b474c --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F240B/configs/chconf.h @@ -0,0 +1,38 @@ +/* Copyright 2020 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* + * This file was auto-generated by: + * `qmk chibios-confmigrate -i platforms/chibios/boards/SN_SN32F240B/configs/chconf.h -r platforms/chibios/boards/common/configs/chconf.h` + */ + +#pragma once + +#define CH_CFG_ST_FREQUENCY 10000 + +#define CH_CFG_ST_TIMEDELTA 0 + +#include_next + +#undef CH_CFG_IDLE_ENTER_HOOK +#define CH_CFG_IDLE_ENTER_HOOK() { \ + SN_PMU->CTRL = 4; \ +} + +#undef CH_CFG_IDLE_LEAVE_HOOK +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + SN_PMU->CTRL = 0; \ +} diff --git a/platforms/chibios/boards/SN_SN32F240B/configs/halconf.h b/platforms/chibios/boards/SN_SN32F240B/configs/halconf.h new file mode 100644 index 000000000000..47ebc32eaa82 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F240B/configs/halconf.h @@ -0,0 +1,27 @@ +/* Copyright 2020 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* + * This file was auto-generated by: + * `qmk chibios-confmigrate -i platforms/chibios/boards/SN_SN32F240B/configs/halconf.h -r platforms/chibios/boards/common/configs/halconf.h` + */ + +#pragma once + +#define HAL_USE_PWM TRUE + +#include_next + diff --git a/platforms/chibios/boards/SN_SN32F240B/configs/mcuconf.h b/platforms/chibios/boards/SN_SN32F240B/configs/mcuconf.h new file mode 100644 index 000000000000..f6f0e8d20e10 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F240B/configs/mcuconf.h @@ -0,0 +1,69 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * SN32F24xB drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define SN32F24xB_MCUCONF +#define PLATFORM_MCUCONF +/* + * HAL driver system settings. + */ +/* + * CT driver system settings. + */ +#define SN32_HAS_CT16B0 TRUE +#define SN32_HAS_CT16B1 TRUE +/* + * PWM driver system settings. + */ +#define SN32_PWM_USE_CT16B1 TRUE +#define SN32_PWM_NO_RESET TRUE +/* + * SN driver system settings. + */ +#define SN32_HAS_GPIOA TRUE +#define SN32_HAS_GPIOB TRUE +#define SN32_HAS_GPIOC TRUE +#define SN32_HAS_GPIOD TRUE + +/* + * USB driver system settings. + */ +#define SN32_HAS_USB TRUE +#define SN32_USB_USE_USB1 TRUE + +/* + * System Clock settings. + */ +// Defaults are correct + + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/boards/SN_SN32F260/board/board.mk b/platforms/chibios/boards/SN_SN32F260/board/board.mk new file mode 100644 index 000000000000..0d7092f02d55 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F260/board/board.mk @@ -0,0 +1,22 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS_CONTRIB)/os/hal/boards/SN_SN32F260/board.c + +# Required include directories +BOARDINC = $(CHIBIOS_CONTRIB)/os/hal/boards/SN_SN32F260 + +# Optimize for size +# OPT = s /set by default + +# Enter lower-power sleep mode when on the ChibiOS idle thread +OPT_DEFS += -DCORTEX_ENABLE_WFI_IDLE=TRUE + +# Shave some extra bytes +OPT_DEFS += -DCRT1_AREAS_NUMBER=1 + +# Some options to reduce RAM usage +USE_LINK_GC = yes +LTO_ENABLE = yes + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/boards/SN_SN32F260/configs/chconf.h b/platforms/chibios/boards/SN_SN32F260/configs/chconf.h new file mode 100644 index 000000000000..7be313796820 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F260/configs/chconf.h @@ -0,0 +1,62 @@ +/* Copyright 2020 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* + * This file was auto-generated by: + * `qmk chibios-confmigrate -i platforms/chibios/boards/SN_SN32F260/configs/chconf.h -r platforms/chibios/boards/common/configs/chconf.h` + */ + +#pragma once + +#define CH_CFG_ST_FREQUENCY 10000 + +#define CH_CFG_ST_TIMEDELTA 0 + +#define CH_CFG_OPTIMIZE_SPEED FALSE + +#define CH_CFG_USE_TIMESTAMP FALSE + +#define CH_CFG_USE_SEMAPHORES FALSE + +#define CH_CFG_USE_MUTEXES FALSE + +#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE + +#define CH_CFG_USE_MESSAGES TRUE + +#define CH_CFG_USE_MAILBOXES TRUE + +#define CH_CFG_USE_MEMCORE FALSE + +#include_next + +#undef CH_CFG_IDLE_ENTER_HOOK +#define CH_CFG_IDLE_ENTER_HOOK() { \ + SN_PMU->CTRL = 4; \ +} + +#undef CH_CFG_IDLE_LEAVE_HOOK +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + SN_PMU->CTRL = 0; \ +} +#define PORT_IDLE_THREAD_STACK_SIZE 0 +#define PORT_INT_REQUIRED_STACK 0 + +/* can't call sleep without the idle thread, must override related functions */ +#if CH_CFG_NO_IDLE_THREAD == TRUE + #pragma weak chThdSleep + #pragma weak chThdSuspendTimeoutS +#endif diff --git a/platforms/chibios/boards/SN_SN32F260/configs/config.h b/platforms/chibios/boards/SN_SN32F260/configs/config.h new file mode 100644 index 000000000000..7d44b7a32a85 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F260/configs/config.h @@ -0,0 +1,20 @@ +/* Copyright 2022 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#pragma once + +#define RAW_IN_CAPACITY 1 +#define RAW_OUT_CAPACITY 1 diff --git a/platforms/chibios/boards/SN_SN32F260/configs/mcuconf.h b/platforms/chibios/boards/SN_SN32F260/configs/mcuconf.h new file mode 100644 index 000000000000..7bb383d3a6d7 --- /dev/null +++ b/platforms/chibios/boards/SN_SN32F260/configs/mcuconf.h @@ -0,0 +1,70 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * SN32F26x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define SN32F26x_MCUCONF +#define PLATFORM_MCUCONF + +/* + * HAL driver system settings. + */ +/* + * CT driver system settings. + */ +#define SN32_HAS_CT16B0 TRUE +#define SN32_HAS_CT16B1 TRUE +/* + * PWM driver system settings. + */ +#define SN32_PWM_USE_CT16B1 TRUE +#define SN32_PWM_NO_RESET TRUE +/* + * SN driver system settings. + */ +#define SN32_HAS_GPIOA TRUE +#define SN32_HAS_GPIOB TRUE +#define SN32_HAS_GPIOC TRUE +#define SN32_HAS_GPIOD TRUE + +/* + * USB driver system settings. + */ +#define SN32_HAS_USB TRUE +#define SN32_USB_USE_USB1 TRUE + +/* + * System Clock settings. + */ +// Defaults are correct + + +#endif /* MCUCONF_H */ diff --git a/platforms/chibios/bootloader.mk b/platforms/chibios/bootloader.mk index 0568d353219b..d862ad06a4e0 100644 --- a/platforms/chibios/bootloader.mk +++ b/platforms/chibios/bootloader.mk @@ -28,6 +28,7 @@ # wb32-dfu WB32 USB DFU in ROM # tinyuf2 TinyUF2 # rp2040 Raspberry Pi RP2040 +# sn32-dfu SN32 USB DFU in ROM # Current options for RISC-V: # gd32v-dfu GD32V USB DFU in ROM # @@ -112,6 +113,10 @@ ifeq ($(strip $(BOOTLOADER)), wb32-dfu) OPT_DEFS += -DBOOTLOADER_WB32_DFU BOOTLOADER_TYPE = wb32_dfu endif +ifeq ($(strip $(BOOTLOADER)), sn32-dfu) + OPT_DEFS += -DBOOTLOADER_SN32_DFU + BOOTLOADER_TYPE = sn32_dfu +endif ifeq ($(strip $(BOOTLOADER_TYPE)),) ifneq ($(strip $(BOOTLOADER)),) diff --git a/platforms/chibios/bootloaders/sn32_dfu.c b/platforms/chibios/bootloaders/sn32_dfu.c new file mode 100644 index 000000000000..daf9a4c0d30b --- /dev/null +++ b/platforms/chibios/bootloaders/sn32_dfu.c @@ -0,0 +1,52 @@ +/* Copyright 2022 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include "bootloader.h" + +#include +#include +#include "wait.h" + +# define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) +extern uint32_t __ram0_end__; +# define BOOTLOADER_MAGIC 0xDEADBEEF +# define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4) + +__attribute__((weak)) void bootloader_jump(void) { + *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader + // Wait for memory to be set before the reset + wait_us(1); + NVIC_SystemReset(); +} + +/** Enter bootloader mode if requested + */ +void enter_bootloader_mode_if_requested(void) { + unsigned long *check = MAGIC_ADDR; + if (*check == BOOTLOADER_MAGIC) { + *check = 0; + + void(*recovery)(void) = (void*)SN32_BOOTLOADER_ADDRESS; + recovery(); + + while (1) + ; + } +} + +__attribute__((weak)) void mcu_reset(void) { + NVIC_SystemReset(); +} diff --git a/platforms/chibios/chibios_config.h b/platforms/chibios/chibios_config.h index 4c8333f07bb3..341627468537 100644 --- a/platforms/chibios/chibios_config.h +++ b/platforms/chibios/chibios_config.h @@ -150,3 +150,7 @@ #ifndef SPI_MISO_FLAGS # define SPI_MISO_FLAGS PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_OUTPUT_TYPE_PUSHPULL | PAL_OUTPUT_SPEED_HIGHEST #endif + +#if defined(SN32F2) +# define CPU_CLOCK SN32_HCLK +#endif diff --git a/platforms/chibios/platform.mk b/platforms/chibios/platform.mk index b2a8ec89e138..0e0b03ca9bde 100644 --- a/platforms/chibios/platform.mk +++ b/platforms/chibios/platform.mk @@ -155,6 +155,10 @@ ifdef WB32_BOOTLOADER_ADDRESS OPT_DEFS += -DWB32_BOOTLOADER_ADDRESS=$(WB32_BOOTLOADER_ADDRESS) endif +ifdef SN32_BOOTLOADER_ADDRESS + OPT_DEFS += -DSN32_BOOTLOADER_ADDRESS=$(SN32_BOOTLOADER_ADDRESS) +endif + # Work out if we need to set up the include for the bootloader definitions ifneq ("$(wildcard $(KEYBOARD_PATH_5)/bootloader_defs.h)","") OPT_DEFS += -include $(KEYBOARD_PATH_5)/bootloader_defs.h From fbd5082a099e2fd732758d29557fd26e15b5aebb Mon Sep 17 00:00:00 2001 From: "pablin.123.ra@gmail.com" Date: Sat, 5 Nov 2022 11:08:38 +0200 Subject: [PATCH 2/2] Wear-Leveling driver for SN32 platform Squashed commit of the following: commit 3825989990504208ab3e5479172de2b5a112faeb Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:42:04 2022 -0500 Change page count commit 5d1aa4b9f580bac0a4e337d403b1038f30ea69d3 Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:32:43 2022 -0500 Rename SN32 WL driver, guard the last page commit 581986bc92c7f5c21eac3e1177ea8de9ff4b2ee0 Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:14:22 2022 -0500 Fix typo on store_erase commit e31f2d153a549041dcf6724180e988527632a29d Author: pablin.123.ra@gmail.com Date: Wed Oct 12 15:05:41 2022 -0500 Wear-Leveling driver for SN32 platform --- builddefs/common_features.mk | 5 +- keyboards/handwired/onekey/sn32/rules.mk | 2 + platforms/chibios/bootloaders/sn32_dfu.c | 10 ++-- .../wear_leveling/wear_leveling_sn32_flash.c | 56 +++++++++++++++++++ .../wear_leveling_sn32_flash_config.h | 50 +++++++++++++++++ 5 files changed, 117 insertions(+), 6 deletions(-) create mode 100644 platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash.c create mode 100644 platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash_config.h diff --git a/builddefs/common_features.mk b/builddefs/common_features.mk index 9939e0e5df2a..0968ad38efe7 100644 --- a/builddefs/common_features.mk +++ b/builddefs/common_features.mk @@ -250,7 +250,7 @@ else endif endif -VALID_WEAR_LEVELING_DRIVER_TYPES := custom embedded_flash spi_flash rp2040_flash legacy +VALID_WEAR_LEVELING_DRIVER_TYPES := custom embedded_flash spi_flash rp2040_flash legacy sn32_flash WEAR_LEVELING_DRIVER ?= none ifneq ($(strip $(WEAR_LEVELING_DRIVER)),none) ifeq ($(filter $(WEAR_LEVELING_DRIVER),$(VALID_WEAR_LEVELING_DRIVER_TYPES)),) @@ -278,6 +278,9 @@ ifneq ($(strip $(WEAR_LEVELING_DRIVER)),none) COMMON_VPATH += $(PLATFORM_PATH)/$(PLATFORM_KEY)/$(DRIVER_DIR)/flash SRC += flash_stm32.c wear_leveling_legacy.c POST_CONFIG_H += $(PLATFORM_PATH)/$(PLATFORM_KEY)/$(DRIVER_DIR)/wear_leveling/wear_leveling_legacy_config.h + else ifeq ($(strip $(WEAR_LEVELING_DRIVER)), sn32_flash) + SRC += wear_leveling_sn32_flash.c + POST_CONFIG_H += $(PLATFORM_PATH)/$(PLATFORM_KEY)/$(DRIVER_DIR)/wear_leveling/wear_leveling_sn32_flash_config.h endif endif endif diff --git a/keyboards/handwired/onekey/sn32/rules.mk b/keyboards/handwired/onekey/sn32/rules.mk index e69de29bb2d1..047de4137dd5 100644 --- a/keyboards/handwired/onekey/sn32/rules.mk +++ b/keyboards/handwired/onekey/sn32/rules.mk @@ -0,0 +1,2 @@ +EEPROM_DRIVER = wear_leveling +WEAR_LEVELING_DRIVER = sn32_flash diff --git a/platforms/chibios/bootloaders/sn32_dfu.c b/platforms/chibios/bootloaders/sn32_dfu.c index daf9a4c0d30b..de2115365229 100644 --- a/platforms/chibios/bootloaders/sn32_dfu.c +++ b/platforms/chibios/bootloaders/sn32_dfu.c @@ -20,13 +20,13 @@ #include #include "wait.h" -# define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) +#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) extern uint32_t __ram0_end__; -# define BOOTLOADER_MAGIC 0xDEADBEEF -# define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4) +#define BOOTLOADER_MAGIC 0xDEADBEEF +#define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4) __attribute__((weak)) void bootloader_jump(void) { - *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader + *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader // Wait for memory to be set before the reset wait_us(1); NVIC_SystemReset(); @@ -39,7 +39,7 @@ void enter_bootloader_mode_if_requested(void) { if (*check == BOOTLOADER_MAGIC) { *check = 0; - void(*recovery)(void) = (void*)SN32_BOOTLOADER_ADDRESS; + void (*recovery)(void) = (void *)SN32_BOOTLOADER_ADDRESS; recovery(); while (1) diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash.c b/platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash.c new file mode 100644 index 000000000000..f7ec1cc59582 --- /dev/null +++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash.c @@ -0,0 +1,56 @@ +// Copyright 2022 Jose Pablo Ramirez (@jpe230) +// SPDX-License-Identifier: GPL-2.0-or-later +#include +#include "timer.h" +#include "wear_leveling.h" +#include "wear_leveling_internal.h" +#include "Flash.h" + +bool backing_store_init(void) { + bs_dprintf("Init\n"); + return true; +} + +bool backing_store_unlock(void) { + bs_dprintf("Unlock\n"); + return true; +} + +bool backing_store_erase(void) { +#ifdef WEAR_LEVELING_DEBUG_OUTPUT + uint32_t start = timer_read32(); +#endif + + bool ret = true; + FLASH_Status status; + for (int i = 0; i < (WEAR_LEVELING_SN32_EMULATION_PAGE_COUNT); ++i) { + status = FLASH_EraseSector(WEAR_LEVELING_SN32_EMULATION_BASE_PAGE_ADDRESS + (i * WEAR_LEVELING_SN32_PAGE_SIZE)); + if (status == FLASH_FAIL) { + ret = false; + } + } + + bs_dprintf("Backing store erase took %ldms to complete\n", ((long)(timer_read32() - start))); + return ret; +} + +bool backing_store_write(uint32_t address, backing_store_int_t value) { + uint32_t offset = ((WEAR_LEVELING_SN32_EMULATION_BASE_PAGE_ADDRESS) + address); + bs_dprintf("Write "); + wl_dump(offset, &value, sizeof(backing_store_int_t)); + return FLASH_ProgramDWord(offset & 0xFFFFFFFC, value) == FLASH_OKAY; +} + +bool backing_store_lock(void) { + bs_dprintf("Lock \n"); + return true; +} + +bool backing_store_read(uint32_t address, backing_store_int_t* value) { + uint32_t offset = ((WEAR_LEVELING_SN32_EMULATION_BASE_PAGE_ADDRESS) + address); + backing_store_int_t* loc = (backing_store_int_t*)offset; + *value = *loc; + bs_dprintf("Read "); + wl_dump(offset, loc, sizeof(backing_store_int_t)); + return true; +} diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash_config.h b/platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash_config.h new file mode 100644 index 000000000000..7ac9b6555297 --- /dev/null +++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_sn32_flash_config.h @@ -0,0 +1,50 @@ +// Copyright 2022 Jose Pablo Ramirez (@jpe230) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +// Work out the page size to use +#ifndef WEAR_LEVELING_SN32_PAGE_SIZE +# if defined(QMK_MCU_SERIES_SN32F240B) +# define WEAR_LEVELING_SN32_PAGE_SIZE 64 +# elif defined(QMK_MCU_SERIES_SN32F260) +# define WEAR_LEVELING_SN32_PAGE_SIZE 64 +# endif +#endif + +// Number of pages we have +#ifndef WEAR_LEVELING_SN32_EMULATION_TOTAL_PAGE +# if defined(QMK_MCU_SERIES_SN32F240B) +# define WEAR_LEVELING_SN32_EMULATION_TOTAL_PAGE 1024 +# elif defined(QMK_MCU_SERIES_SN32F260) +# define WEAR_LEVELING_SN32_EMULATION_TOTAL_PAGE 480 +# endif +#endif + +// The number of pages to use +#ifndef WEAR_LEVELING_SN32_EMULATION_PAGE_COUNT +# if defined(QMK_MCU_SERIES_SN32F240B) +# define WEAR_LEVELING_SN32_EMULATION_PAGE_COUNT 23 +# elif defined(QMK_MCU_SERIES_SN32F260) +# define WEAR_LEVELING_SN32_EMULATION_PAGE_COUNT 23 +# endif +#endif + +// The origin of the emulated eeprom +#ifndef WEAR_LEVELING_SN32_EMULATION_BASE_PAGE_ADDRESS +# define WEAR_LEVELING_SN32_EMULATION_BASE_PAGE_ADDRESS ((uint32_t)(WEAR_LEVELING_SN32_PAGE_SIZE * WEAR_LEVELING_SN32_EMULATION_TOTAL_PAGE - ((WEAR_LEVELING_SN32_EMULATION_PAGE_COUNT + 1) * WEAR_LEVELING_SN32_PAGE_SIZE))) +#endif + +// 4-byte writes +#ifndef BACKING_STORE_WRITE_SIZE +# define BACKING_STORE_WRITE_SIZE 4 +#endif + +// The amount of space to use for the entire set of emulation +#ifndef WEAR_LEVELING_BACKING_SIZE +# define WEAR_LEVELING_BACKING_SIZE ((WEAR_LEVELING_SN32_EMULATION_PAGE_COUNT)*WEAR_LEVELING_SN32_PAGE_SIZE) +#endif + +// The logical amount of eeprom available +#ifndef WEAR_LEVELING_LOGICAL_SIZE +# define WEAR_LEVELING_LOGICAL_SIZE ((WEAR_LEVELING_BACKING_SIZE) / 2) +#endif