Investigate if there is an alternate way to casting to get a handle to the CPU

[github-actions]

• Maybe the data that needs to be accessed can be part of the public interface
• Maybe we could use the bus itself to access special memory locations to fetch the data
• Maybe could use a debug CoP that can actually be implemented in HW

Line: 9

sirc/sirc-vm/sirc-vm/src/utils/cpu_from_bus.rs

Lines 6 to 16 in 3c958f2

	/// This is a roundabout way to cast it, since we know the bus master
	/// is always the CPU at this point
	pub fn cpu_from_bus(bus_peripheral: &mut BusPeripheral) -> &CpuPeripheral {
	// TODO: Investigate if there is an alternate way to casting to get a handle to the CPU
	// category=Refactoring
	// - Maybe the data that needs to be accessed can be part of the public interface
	// - Maybe we could use the bus itself to access special memory locations to fetch the data
	// - Maybe could use a debug CoP that can actually be implemented in HW
	bus_peripheral
	.bus_master
	.as_any()